13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs

13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs



Product details


Function Memory interface Output frequency (Max) (MHz) 200 Number of outputs 26 Output supply voltage (V) 2.5 Core supply voltage (V) 2.5 Features DDR2 register Operating temperature range (C) 0 to 70 Rating Catalog Output type SSTL-18 Input type SSTL-18 open-in-new Find other Clock buffers

Package | Pins | Size

TSSOP (DGG) 64 138 mm² 17 x 8.1 open-in-new Find other Clock buffers


  • Member of the Texas Instruments Widebus™ Family
  • 1-to-2 Outputs to Support Stacked DDR DIMMs
  • Supports SSTL_2 Data Inputs
  • Outputs Meet SSTL_2 Class II Specifications
  • Differential Clock (CLK and CLK\) Inputs
  • Supports LVCMOS Switching Levels on the RESET\ Input
  • RESET\ Input Disables Differential Input Receivers, Resets All Registers, and Forces All Outputs Low
  • Pinout Optimizes DIMM PCB Layout
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

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This 13-bit to 26-bit registered buffer is designed for 2.3-V to 2.7-V VCC operation.

All inputs are SSTL_2, except the LVCMOS reset (RESET)\ input. All outputs are SSTL_2, Class II compatible.

The SN74SSTV16859 operates from a differential clock (CLK and CLK\). Data are registered at the crossing of CLK going high and CLK\ going low.

The device supports low-power standby operation. When RESET\ is low, the differential input receivers are disabled, and undriven (floating) data, clock, and reference voltage (VREF) inputs are allowed. In addition, when RESET\ is low, all registers are reset and all outputs are forced low. The LVCMOS RESET\ input always must be held at a valid logic high or low level.

To ensure defined outputs from the register before a stable clock has been supplied, RESET\ must be held in the low state during power up.

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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 13
Type Title Date
* Datasheet SN74SSTV16859 datasheet (Rev. D) Aug. 03, 2004
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes 56-Pin Quad Flatpack No-Lead Logic Package Feb. 07, 2003
Application notes Application of the SN74SSTVF16857 in Planar PC2700 (DDR-333) RDIMMs Jan. 10, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature DIMM Module Solution Jun. 13, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application notes Application of the SN74SSTV32852 in Stacked, Low-Profile (1U) PC-1600/2100 DIMMs Nov. 07, 2001
Application notes Low-Power Support Using Texas Instruments SN74SSTV16857 and SN74SSTV16859 Feb. 09, 2001

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