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Product details

Parameters

Number of channels (#) 1 Architecture PLC Line Driver Total supply voltage (Min) (+5V=5, +/-5V=10) 10 Total supply voltage (Max) (+5V=5, +/-5V=10) 28 BW @ Acl (MHz) 150 Acl, min spec gain (V/V) 10 Vn at flatband (Typ) (nV/rtHz) 2.7 Vn at 1 kHz (Typ) (nV/rtHz) 9 Iq per channel (Typ) (mA) 21 Vos (offset voltage @ 25 C) (Max) (mV) 50 Rail-to-rail No Features Shutdown, Adjustable BW/IQ/IOUT Operating temperature range (C) -40 to 85 CMRR (Typ) (dB) 65 Input bias current (Max) (pA) 3500000 Offset drift (Typ) (uV/C) 155 GBW (Typ) (MHz) 150 Output current (Typ) (mA) 417 2nd harmonic (dBc) 100 3rd harmonic (dBc) 89 @ MHz 1 open-in-new Find other Line drivers

Package | Pins | Size

VQFN (RHF) 24 20 mm² 5 x 4 open-in-new Find other Line drivers

Features

  • Low power consumption:
    • Full-bias mode: 23 mA
    • Mid-bias mode: 17.7 mA
    • Low-bias mode: 12.2 mA
    • Low-power shutdown mode
    • IADJ pin for variable bias
  • Low noise:
    • Voltage noise: 2.7 nV/√Hz
    • Inverting current noise: 17 pA/√Hz
    • Noninverting current noise: 1.2 pA/√Hz
  • Low distortion:
    • –100-dBc HD2 (1-MHz,100-Ω
      differential load)
    • –89-dBc HD3 (1-MHz, 100-Ω differential load)
  • High output current: > 416 mA (25-Ω load)
  • Wide output swing:
    43.2 VPP (±12-V, 100-Ω differential load)
  • Wide bandwidth: 150 MHz (GDIFF = 10 V/V)
  • PSRR: 50 dB at 1 MHz for good isolation
  • Wide power-supply range: 10 V to 28 V
  • Thermal protection: 170°C (typical)
  • Alternative device with wider supply and integrated common-mode buffer: THS6222

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Description

The THS6212 is a differential line-driver amplifier with a current-feedback architecture. The device is targeted for use in broadband, wideband power line communications (PLC) line driver applications and is fast enough to support transmissions of 14.5-dBm line power up to 30 MHz.

The unique architecture of the THS6212 uses minimal quiescent current and still achieves very high linearity. Differential distortion under full bias conditions is –93 dBc at 1 MHz and reduces to only –73 dBc at 10 MHz. Fixed multiple bias settings of the amplifiers allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an adjustable current pin (IADJ) is available to further lower the bias currents.

The wide output swing of 43.2 VPP (100-Ω differential load) with ±12-V power supplies, coupled with over a 416-mA current drive (25-Ω load), allows for wide dynamic headroom that keeps distortion minimal.

The THS6212 is available in a 24-pin VQFN package and a 17 bond pad wafer sale package.

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Same functionality and pinout but is not an equivalent to the compared device:
THS6222 ACTIVE Differential broadband PLC and HPLC line driver with common-mode buffer Pin compatible QFN package with integrated common mode buffer and a wider operating supply range of 8V to 32V

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 3
Type Title Date
* Datasheet THS6212 Differential Broadband PLC Line Driver Amplifier datasheet (Rev. D) Nov. 15, 2019
White papers The Signal e-book: A compendium of blog posts on op amp design topics Mar. 28, 2017
Application notes Noise Analysis for High Speed Op Amps (Rev. A) Jan. 17, 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
99
Description
The THS6212 Evaluation module (EVM) is used to evaluate the THS6212, which is single-port current-feedback architecture, differential line driver amplifier system in a 24-pin QFN package. The EVM is designed to quickly and easily demonstrate the functionality and performance of THS6212 in a gain of (...)
Features
  • Configured for split-supply operation and easily modified for single supply
  • Designed for single-ended input and output connection facilitated by the on-board balun
  • Simple interface to the inputs and outputs through SMA connectors
  • Bias mode settings changed using jumper connectors

Design tools & simulation

SIMULATION MODELS Download
SBOM980.TSC (353 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SBOM981.ZIP (11 KB) - TINA-TI Spice Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
(YS) 0 View options
VQFN (RHF) 24 View options

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