2-A/2-A dual-channel gate driver with two AND inputs for each output
Product details
Parameters
Package | Pins | Size
Features
- Industry-Standard Driver Replacement
- 25-ns Max Rise/Fall Times and 40-ns Max Propagation Delay – 1-nF Load, VCC = 14 V
- 2-A Peak Output Current, VCC = 14 V
- 5-µA Supply Current — Input High or Low
- 4-V to 14-V Supply-Voltage Range; Internal Regulator Extends Range to 40 V (TPS2811, TPS2812, TPS2813)
- –40°C to 125°C Ambient-Temperature Operating Range
Description
The TPS28xx series of dual high-speed MOSFET drivers are capable of delivering peak currents of 2 A into highly capacitive loads. This performance is achieved with a design that inherently minimizes shoot-through current and consumes an order of magnitude less supply current than competitive products.
The TPS2811, TPS2812, and TPS2813 drivers include a regulator to allow operation with supply inputs between 14 V and 40 V. The regulator output can power other circuitry, provided power dissipation does not exceed package limitations. When the regulator is not required, REG_IN and REG_OUT can be left disconnected or both can be connected to VCC or GND.
The TPS2814 and the TPS2815 have 2-input gates that give the user greater flexibility in controlling the MOSFET. The TPS2814 has AND input gates with one inverting input. The TPS2815 has dual-input NAND gates.
TPS28xx series drivers, available in 8-pin PDIP, SOIC, and TSSOP packages operate over a ambient temperature range of 40°C to 125°C.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | Dual High-Speed MOSFET Drivers datasheet (Rev. F) | Oct. 13, 2004 |
Application note | External Gate Resistor Selection Guide (Rev. A) | Feb. 28, 2020 | |
Application note | Understanding Peak IOH and IOL Currents (Rev. A) | Feb. 28, 2020 | |
More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | Oct. 29, 2018 | |
Technical article | How to achieve higher system robustness in DC drives, part 3: minimum input pulse | Sep. 19, 2018 | |
Selection guide | Power Management Guide 2018 (Rev. R) | Jun. 25, 2018 | |
Technical article | How to achieve higher system robustness in DC drives, part 2: interlock and deadtime | May 30, 2018 | |
Technical article | Boosting efficiency for your solar inverter designs | May 24, 2018 | |
Technical article | How to achieve higher system robustness in DC drives, part 1: negative voltage | Apr. 17, 2018 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
PDIP (P) | 8 | View options |
SOIC (D) | 8 | View options |
TSSOP (PW) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.