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TPS51116

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Complete DDR, DDR2, DDR3, DDR3L, LPDDR3 and DDR4 power solution synchronous buck controller, 3A LDO

Product details

Product type DDR Vin (min) (V) 3 Vin (max) (V) 28 Vout (min) (V) 0.75 Vout (max) (V) 3 Features Complete Solution, Shutdown Pin for S3 Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 0.8 DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
Product type DDR Vin (min) (V) 3 Vin (max) (V) 28 Vout (min) (V) 0.75 Vout (max) (V) 3 Features Complete Solution, Shutdown Pin for S3 Rating Catalog Operating temperature range (°C) -40 to 85 Iq (typ) (mA) 0.8 DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3
HTSSOP (PWP) 20 41.6 mm² (6.5 mm × 6.4 mm) VQFN (RGE) 24 16 mm² (4 mm × 4 mm)
  • Synchronous Buck Controller (VDDQ)
    • Wide-Input Voltage Range: 3.0-V to 28-V
    • D−CAP™ Mode with 100-ns Load Step Response
    • Current Mode Option Supports Ceramic Output Capacitors
    • Supports Soft-Off in S4/S5 States
    • Current Sensing from RDS(on) or Resistor
    • 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
      1.5-V (DDR3), 1.35-V (DDR3L), 1.2-V (LPDDR3 and DDR4) or
      Output Range 0.75-V to 3.0-V
    • Equipped with Powergood, Overvoltage Protection and Undervoltage Protection
  • 3-A LDO (VTT), Buffered Reference (VREF)
    • Capable to Sink and Source 3 A
    • LDO Input Available to Optimize Power Losses
    • Requires only 20-µF Ceramic Output Capacitor
    • Buffered Low Noise 10-mA VREF Output
    • Accuracy ±20 mV for both VREF and VTT
    • Supports High-Z in S3 and Soft-Off in S4/S5
    • Thermal Shutdown
  • Synchronous Buck Controller (VDDQ)
    • Wide-Input Voltage Range: 3.0-V to 28-V
    • D−CAP™ Mode with 100-ns Load Step Response
    • Current Mode Option Supports Ceramic Output Capacitors
    • Supports Soft-Off in S4/S5 States
    • Current Sensing from RDS(on) or Resistor
    • 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
      1.5-V (DDR3), 1.35-V (DDR3L), 1.2-V (LPDDR3 and DDR4) or
      Output Range 0.75-V to 3.0-V
    • Equipped with Powergood, Overvoltage Protection and Undervoltage Protection
  • 3-A LDO (VTT), Buffered Reference (VREF)
    • Capable to Sink and Source 3 A
    • LDO Input Available to Optimize Power Losses
    • Requires only 20-µF Ceramic Output Capacitor
    • Buffered Low Noise 10-mA VREF Output
    • Accuracy ±20 mV for both VREF and VTT
    • Supports High-Z in S3 and Soft-Off in S4/S5
    • Thermal Shutdown

The TPS51116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, DDR3/SSTL-15, DDR3L, LPDDR3 and DDR4 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator and buffered low noise reference. The device offers the lowest total solution cost in systems where space is at a premium. The synchronous controller runs fixed 400-kHz, pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP™ Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3-A sink/source LDO maintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The device supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). The device has all of the protection features including thermal shutdown and is offered in both a 20-pin HTSSOP PowerPAD™ package and 24-pin 4 × 4 QFN.

The TPS51116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, DDR3/SSTL-15, DDR3L, LPDDR3 and DDR4 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator and buffered low noise reference. The device offers the lowest total solution cost in systems where space is at a premium. The synchronous controller runs fixed 400-kHz, pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP™ Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3-A sink/source LDO maintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The device supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). The device has all of the protection features including thermal shutdown and is offered in both a 20-pin HTSSOP PowerPAD™ package and 24-pin 4 × 4 QFN.

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Technical documentation

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* Data sheet TPS51116 Complete DDR, DDR2, DDR3, DDR3L, LPDDR3 and DDR4 Power Solution Synchronous Buck Controller, 3-A LDO, Buffered Reference datasheet (Rev. J) PDF | HTML Nov 16, 2017
Analog design Journal Control-Mode Quick Reference Guide (Rev. B) PDF | HTML Aug 29, 2023
Application note DDR VTT Power Solutions: A Competitive Analysis (Rev. A) Jul 9, 2020
Selection guide Power Management Guide 2018 (Rev. R) Jun 25, 2018
Technical article Design advantage of D-CAP control topology PDF | HTML Apr 13, 2017
Technical article D-CAP3 – A sequel better than the original PDF | HTML May 7, 2015
More literature Computing DDR DC-DC Power Solutions Aug 22, 2012
Application note Intel Core i3, i5, i7 [Arrandale] Reference Design Jul 21, 2010
Application note Intel EP80579 Tolopai System-on-Chip Reference Design Jul 21, 2010
Application note Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOs Apr 28, 2010
Application note Power Two Xilinx(TM) LX240 Virtex-6(TM) Devices Apr 20, 2010
Application note Power Ref Design for TMS320C6472 5Vin DC/DC Converters (1x C6472) Mar 31, 2010
Application note 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472) Mar 26, 2010
Application note TMS320C6472 5V Input Pwr Design, Integrated FET DC/DC Converters and Controllers Mar 26, 2010
Application note Power Reference Design for the 'C6472, 12V DCDC Controllers, and LDOs Mar 26, 2010
Application note Cyclone™ III FPGA Starter Kit Power Reference Design Mar 27, 2008
Application note DDR2 Power Solutions for Notebooks May 24, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TPS51116EVM-001 — TPS51116 Memory Power Solution, Synchronous Buck Controller Evaluation Module

The TPS51116EVM evaluation module (EVM) is a dual-output converter for DDR and DDRII memory modules. It uses a 10 A synchronous buck converter to provide the core voltage (VDDQ) for DDR memory modules. The EVM is designed to use a 4.5 V to 28 V supply voltage and a 4.75 V to (...)

User guide: PDF
Supported products & hardware
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Simulation model

TPS51116 PSpice Transient Model (Rev. B)

SLIM076 (96 KB) - PSpice model
Supported products & hardware
Simulation model

TPS51116 TINA-TI Transient Reference Design

SLUM166.TSC (224 KB) - TINA-TI reference design
Supported products & hardware
Simulation model

TPS51116 TINA-TI Transient Spice Model

SLUM167.ZIP (58 KB) - TINA-TI Spice model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
HTSSOP (PWP) 20 Ultra Librarian
VQFN (RGE) 24 Ultra Librarian

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