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Product details

Parameters

DDR memory type DDR, DDR2, DDR3, DDR3L, DDR4, LPDDR2, LPDDR3 Control mode Current Mode, D-CAP Iout VDDQ (Max) (A) 25 Iout VTT (Max) (A) 3 Iq (Typ) (mA) 0.8 Output VDDQ, VREF, VTT Vin (Min) (V) 3 Vin (Max) (V) 28 Features Status Pin Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other DDR memory power ICs

Package | Pins | Size

VQFN (RGE) 24 16 mm² 4 x 4 open-in-new Find other DDR memory power ICs

Features

  • Synchronous Buck Controller (VDDQ)
    • Wide-Input Voltage Range: 3.0-V to 28-V
    • D-CAP™ Mode with 100-ns Load Step Response
    • Current Mode Option Supports Ceramic Output Capacitors
    • Supports Soft-Off in S4/S5 States
    • Current Sensing from RDS(on) or Resistor
    • 2.5-V (DDR), 1.8-V (DDR2), Adjustable to 1.5-V (DDR3) or
      Output Range 0.75-V to 3.0-V
    • Equipped with Powergood, Overvoltage Protection and
      Undervoltage Protection
  • 3-A LDO (VTT), Buffered Reference (VREF)
    • Capable to Sink and Source 3 A
    • LDO Input Available to Optimize Power Losses
    • Requires Small 20-µF Ceramic Output Capacitor
    • Buffered Low Noise 10-mA VREF Output
    • Accuracy ±20 mV for both VREF and VTT
    • Supports High-Z in S3 and Soft-Off in S4/S5
    • Thermal Shutdown
  • APPLICATIONS
    • DDR/DDR2/DDR3/LPDDR3 Memory Power
      Supplies in Embedded Computing System
    • SSTL-2 SSTL-18 and HSTL Termination

D-CAP, PowerPAD are trademarks of Texas Instruments.

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Description

The TPS59116 provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, and DDR3 memory systems. It integrates a synchronous buck controller with a 3-A sink/source tracking linear regulator and buffered low noise reference. The TPS59116 offers the lowest total solution cost in systems where space is at a premium. The TPS59116 synchronous controller runs fixed 400-kHz pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP™ Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3-A sink/source LDO maintains fast transient response only requiring 20-µF (2 × 10 µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The TPS59116 supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-off) in S4/S5 (suspend to disk). TPS59116 has all of the protection features including thermal shutdown and is offered in both a 20-pin HTSSOP PowerPAD™ package and 24-pin 4×4 QFN.

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Technical documentation

= Featured
No results found. Please clear your search and try again. View all 5
Type Title Date
* Datasheet Complete DDR, DDR2 and DDR3 Memory Power Solution SBC datasheet Apr. 30, 2010
Technical articles A New Understanding: Blast Motion redefines movement, tracking and training for athletes. Aug. 06, 2014
Technical articles Improving Fly-Buck Regulation Using Opto (Part-1) Jul. 15, 2014
Technical articles Altium and WEBENCH – together at last Jul. 12, 2014
Technical articles Using telemetry in point-of-load applications Jun. 24, 2014

Design & development

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VQFN (RGE) 24 View options

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