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TPS62912

ACTIVE

17-VIN, 2-A low noise and low ripple buck converter with integrated ferrite bead filter compensation

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Product details

Parameters

Vin (Min) (V) 3 Vin (Max) (V) 17 Vout (Min) (V) 0.8 Vout (Max) (V) 5.5 Iout (Max) (A) 2 Iq (Typ) (uA) 5000 Switching frequency (Min) (kHz) 900 Switching frequency (Max) (kHz) 2420 Features Enable, Frequency Synchronization, Output Discharge, Over Current Protection, Power Good, Soft Start Adjustable, Spread Spectrum, Synchronous Rectification, UVLO Fixed Operating temperature range (C) -40 to 150 Rating Catalog Regulated outputs (#) 1 open-in-new Find other Buck converters (integrated switch)

Package | Pins | Size

VQFN-HR (RPU) 10 4 mm² 2 x 2 open-in-new Find other Buck converters (integrated switch)

Features

  • Low output 1/f noise < 20 µVRMS(100 Hz to 100 kHz)
  • Low output voltage ripple < 10 µVRMS after ferrite bead
  • High PSRR of > 65 dB (up to 100 kHz)
  • 2.2-MHz or 1-MHz fixed frequency peak current mode control
  • Synchronizable with external clock (optional)
  • Integrated loop compensation supports ferrite bead for second stage L-C filter with 30-dB attenuation (optional)
  • Spread spectrum modulation (optional)
  • 3.0-V to 17-V input voltage range
  • 0.8-V to 5.5-V output voltage range
  • 57-mΩ/20-mΩ RDSon
  • Output voltage accuracy of ±1%
  • Precise enable input allows
    • User-defined undervoltage lockout
    • Exact sequencing
  • Adjustable soft start
  • Power-good output
  • Output discharge (optional)
  • –40°C to 150°C junction temperature range
  • 2.0-mm × 2.0-mm QFN with 0.5-mm pitch
  • Create a custom design using the TPS6291x with the WEBENCH Power Designer
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Description

The TPS6291x devices are a family of high-efficiency, low noise and low ripple current mode synchronous buck converters. The devices are ideal for noise sensitive applications that would normally use an LDO for post regulation such as high-speed ADCs, clock and jitter cleaner, serializer, de-serializer, and radar applications.

The devices operate at a fixed switching frequency of 2.2 MHz or 1 MHz, and can be synchronized to an external clock.

To further reduce the output voltage ripple, the device integrates loop compensation to operate with an optional second-stage ferrite bead L-C filter. This allows an output voltage ripple below 10 µVRMS.

Low-frequency noise levels, similar to a low-noise LDO, are achieved by filtering the internal voltage reference with a capacitor connected to the NR/SS pin.

The optional spread spectrum modulation scheme spreads the DC/DC switching frequency over a wider span, which lowers the mixing spurs.

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NEW TPS62913 ACTIVE 17-VIN, 3-A low noise and low ripple buck converter with integrated ferrite bead filter compensation 3-A pin-to-pin compatible product offering higher current.

Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
49
Description
The TPS62912EVM-077 (BSR077-002) evaluation module (EVM) facilitates the evaluation of the TPS62912 2-A low noise and low ripple buck converter with integrated ferrite bead filter compensation in a small 2-mm by 2-mm QFN package. The EVM outputs a 3.3-V output voltage from input voltages up to 17 (...)
Features
  • Low noise ( < 20 μVRMS)
  • Low output voltage ripple ( < 10 μVRMS)
  • 17-V input voltage range
  • 3.3-V output voltage
  • 2-A output current

Design tools & simulation

SIMULATION MODEL Download
SLVMDF7.ZIP (273 KB) - PSpice Model
SIMULATION MODEL Download
SLVMDJ1.ZIP (964 KB) - SIMPLIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
GERBER FILE Download
SLVC818.ZIP (509 KB)

CAD/CAE symbols

Package Pins Download
VQFN-HR (RPU) 10 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

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