The TPS65919-Q1 PMIC integrates four configurable step-down converters with up to 3.5 A of output current to power the processor core, memory, I/O, and preregulation of LDOs The device is AEC-Q100 qualified. The step-down converters are synchronized to an internal 2.2-MHz clock to improve EMC performance of the device. The GPIO_3 pin allows the step-down converters to synchronize to an external clock, allowing multiple devices to synchronize to the same clock which improves system-level EMC performance. The device also contains four LDOs to power low-current or low-noise domains.
The power-sequence controller uses one-time programmable (OTP) memory to control the power sequences, as well as default configurations such as output voltage and GPIO configurations. The OTP is factory-programmed to allow start-up without any software required. Most static settings can be changed from the default through SPI or I2C to configure the device to meet many different system needs. For example, voltage-scaling registers are used to support dynamic voltage-scaling requirements of processors. The OTP also contains a bit-integrity-error detection feature to stop the power-up sequence if an error is detected, preventing the system from starting in an unknown state.
The TPS65919-Q1 device also includes an analog-to-digital converter (ADC) to monitor the system state. The GPADC includes two external channels to monitor any external voltage, as well as internal channels to measure supply voltage, output current, and die temperature, allowing the processor to monitor the health of the system. The device offers a watchdog to monitor for software lockup, and includes protection and diagnostic mechanisms such as short-circuit protection, thermal monitoring, shutdown, and automatic ADC conversions to detect if a voltage is below a predefined threshold. The PMIC can notify the processor of these events through the interrupt handler, allowing the processor to take action in response.
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| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | TPS65919-Q1 Power Management Unit (PMU) for Processor datasheet (Rev. A) | PDF | HTML | 20 Aug 2018 |
| Application note | TPS6591x-Q1 Design Checklist (Rev. A) | 06 May 2021 | ||
| User guide | TPS65919-Q1 and TPS65917-Q1 User's Guide to Power DRA78x, and TDA3x (Rev. E) | 13 Mar 2019 | ||
| Application note | POR Generation in TPS65903x, TPS65917-Q1, TPS65919-Q1, and TPS65916 Devices (Rev. A) | 21 Sep 2018 | ||
| Application note | TPS65917 Power Estimation Tool (Rev. B) | 14 Jun 2018 | ||
| User guide | TPS65919-Q1 and TPS65917-Q1 User's Guide to Power DRA71x, DRA79x, and TDA2E-17 (Rev. E) | 07 May 2018 | ||
| Application note | Guide to Using the GPADC in TPS65903x, TPS65917-Q1, TPS65919-Q1, and TPS65916 de (Rev. A) | 13 Dec 2017 | ||
| Functional safety information | Safety Manual for TPS65919-Q1 Power Management Unit (PMU) | 18 Aug 2017 | ||
| User guide | TPS65919-Q1 Register Map | 17 Aug 2017 | ||
| Application note | Adaptive (Dynamic) Voltage (Frequency) Scaling – Motivation and Implementations | 28 Mar 2014 |
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The TPS65917-Q1 device is an integrated power-management integrated circuit (PMIC) for automotive applications. The device provides five configurable step-down converters with up to 3.5A of output current for memory, processor core, input/output (I/O), or pre-regulation of LDOs. (...)
| Package | Pins | Download |
|---|---|---|
| VQFN (RGZ) | 48 | View options |
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