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UCC21550-Q1

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Automotive, 4-A/6-A, 5-kVRMS dual-channel isolated gate driver with DIS and DT pins for IGBT

Product details

Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5000 Transient isolation voltage (VIOTM) (VPK) 7070 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, High CMTI, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 13 Input VCC (min) (V) 3 Input VCC (max) (V) 5.5 TI functional safety category Functional Safety-Capable Input threshold CMOS, TTL Operating temperature range (°C) -40 to 150 Rating Automotive Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8
Number of channels 2 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5000 Transient isolation voltage (VIOTM) (VPK) 7070 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 6 Features Disable, High CMTI, Programmable dead time Output VCC/VDD (max) (V) 25 Output VCC/VDD (min) (V) 13 Input VCC (min) (V) 3 Input VCC (max) (V) 5.5 TI functional safety category Functional Safety-Capable Input threshold CMOS, TTL Operating temperature range (°C) -40 to 150 Rating Automotive Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Universal: dual low-side, dual high-side or halfbridge driver

  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Junction temperature range –40 to +150°C
  • Up to 4-A peak source and 6-A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125 V/ns
  • Up to 25-V VDD output drive supply
    • 5-V, 8-V VDD UVLO options
  • Switching parameters:
    • 33-ns typical propagation delay
    • 5-ns maximum pulse-width distortion
    • 10-µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing
  • Universal: dual low-side, dual high-side or halfbridge driver

  • AEC-Q100 qualified with the following results
    • Device temperature grade 1
    • Device HBM ESD classification level H2
    • Device CDM ESD classification level C4B
  • Junction temperature range –40 to +150°C
  • Up to 4-A peak source and 6-A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125 V/ns
  • Up to 25-V VDD output drive supply
    • 5-V, 8-V VDD UVLO options
  • Switching parameters:
    • 33-ns typical propagation delay
    • 5-ns maximum pulse-width distortion
    • 10-µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast disable for power sequencing

The UCC21550-Q1 is an isolated dual channel gate driver family with programmable dead time and wide temperature range. It is designed with 4-A peak-source and 6-A peak-sink current to drive power MOSFET, SiC, GaN, and IGBT transistors.

The UCC21550-Q1 can be configured as two low-sidedrivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5-kV RMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and integrated de-glitch filter that rejects input transients shorter than 5 ns. All supplies have UVLO protection.

With all these advanced features, the UCC21550-Q1 device enables high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21550-Q1 is an isolated dual channel gate driver family with programmable dead time and wide temperature range. It is designed with 4-A peak-source and 6-A peak-sink current to drive power MOSFET, SiC, GaN, and IGBT transistors.

The UCC21550-Q1 can be configured as two low-sidedrivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5-kV RMS isolation barrier, with a minimum of 125-V/ns common-mode transient immunity (CMTI).

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and integrated de-glitch filter that rejects input transients shorter than 5 ns. All supplies have UVLO protection.

With all these advanced features, the UCC21550-Q1 device enables high efficiency, high power density, and robustness in a wide variety of power applications.

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Technical documentation

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Type Title Date
* Data sheet UCC21550x-Q1 Automotive4-A, 6-A, Reinforced Isolation Dual-Channel Gate Driver datasheet (Rev. B) PDF | HTML 10 Nov 2023
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
Technical article Why capacitive isolation: a vital building block for sensors in smart cities 16 Jan 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC21520EVM-286 — UCC21520 4A/6A isolated dual-channel gate driver evaluation module

UCC21520EVM-286 is designed for evaluating UCC21520DW, which is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current capability. This EVM could be served as a reference design for driving power MOSFETS, IGBTS, and SiC MOSFETS with UCC21520 pin function identification, (...)

User guide: PDF | HTML
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Simulation model

UCC21550B-Q1 PSpice Model

SLUM881.ZIP (157 KB) - PSpice Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (DW) 16 View options

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