Home Power management Gate drivers Half-bridge drivers

UCC27712

ACTIVE
Order now

1.8-A/2.8-A, 620V half bridge driver with interlock

Data sheet
Top
1.8-A/2.8-A, 620V half bridge driver with interlock

UCC27712

ACTIVE
Data sheet Order now

Product details

Parameters

Bus voltage (Max) (V) 620 Power switch MOSFET, IGBT Input VCC (Min) (V) 10 Input VCC (Max) (V) 20 Peak output current (A) 2.8 Rise time (ns) 16 Operating temperature range (C) -40 to 125 Rating Catalog Number of channels (#) 2 Fall time (ns) 10 Prop delay (ns) 100 Iq (uA) 250 Input threshold TTL, CMOS Channel input logic Non-Inverting Negative voltage handling at HS pin (V) -11 Features Interlock open-in-new Find other Half-bridge drivers

Package | Pins | Size

SOIC (D) 8 19 mm² 4.9 x 3.9 open-in-new Find other Half-bridge drivers

Features

  • High-side and low-side configuration
  • Dual inputs with output interlock and 150-ns deadtime
  • Fully operational up to 620-V, 700-V absolute maximum on HB pin
  • 10-V to 20-V VDD recommended range
  • Peak output current 2.8-A sink, 1.8-A source
  • dv/dt immunity of 50 V/ns
  • Logic operational up to –11 V on HS pin
  • Negative voltage tolerance on inputs of –5 V
  • Large negative transient safe operating area
  • UVLO protection for both channels
  • Small propagation delay (100-ns typical)
  • Delay matching (12-ns typical)
  • Floating channel designed for bootstrap operation
  • Low quiescent current
  • TTL and CMOS compatible inputs
  • Industry standard SOIC-8 package
  • All parameters specified over temperature range, –40 °C to +125 °C

All trademarks are the property of their respective owners.

open-in-new Find other Half-bridge drivers

Description

The UCC27712 is a 620-V high-side and low-side gate driver with 1.8-A source, 2.8-A sink current, targeted to drive power MOSFETs or IGBTs.

The recommended VDD operating voltage is 10-V to 20-V for IGBT’s and 10-V to 17-V for power MOSFETs.

The UCC27712 includes protection features where the outputs are held low when the inputs are left open or when the minimum input pulse width specification is not met. Interlock and deadtime functions prevent both outputs from being turned on simultaneously. In addition, the device accepts a wide range bias supply range and offers UVLO protection for both the VDD and HB bias supply.

Developed with TI’s state of the art high-voltage device technology, the device features robust drive with excellent noise and transient immunity including large negative voltage tolerance on its inputs, high dV/dt tolerance, wide negative transient safe operating area (NTSOA) on the switch node (HS), and interlock.

The device consists of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap or isolated power supplies. The device features fast propagation delays and excellent delay matching between both channels. On the UCC27712, each channel is controlled by its respective input pins, HI and LI.

 open-in-new Find other Half-bridge drivers
Download

Technical documentation

= Featured
No results found. Please clear your search and try again. View all 11
Type Title Date
* Datasheet UCC27712 620-V, 1.8-A, 2.8-A High-Side Low-Side Gate Driver with Interlock datasheet (Rev. B) Mar. 05, 2020
Application notes Implementing High-Side Switches Using Half-Bridge Gate Drivers for 48-V Battery. May 12, 2020
Application notes External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application notes Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) Oct. 29, 2018
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
Application notes Bootstrap Circuitry Selection for Half Bridge Configurations Apr. 24, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018
User guides Using the UCC27712EVM-287 Jun. 15, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$99.00
Description
UCC27712EVM-287 is designed for evaluating UCC27712D, which is a 620V half bridge gate driver with high source and sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC component selection guide. The EVM can be (...)
Features
  • High performance driver with half bridge power MOSFETs
  • Ability to test most data sheet parameters
  • Ability to compare performance of various drivers with compatible pinout
  • Ability to easily configure converter topology such as synchronous buck converter
View details

Design tools & simulation

SIMULATION MODELS Download
SLUM579.ZIP (68 KB) - PSpice Model
SIMULATION MODELS Download
SLUM599.TSC (1513 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SLUM600.ZIP (23 KB) - TINA-TI Spice Model
SIMULATION MODELS Download
SLUM637.ZIP (3 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
65W Active clamp flyback with Si FETs reference design for a high power density 5-20V AC/DC adapter
PMP21479 — This reference design uses the UCC28780 active clamp flyback controller to generate a 20-V/15-V/9-V/5-V adjustable output voltage. The maximum power rating is 65 W at 20-V output and up to 3 A at all other output voltage settings. This design reaches a peak efficiency of over 93% using silicon FETs (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Highly Efficient, 1.6kW High Density GaN Based 1MHz CrM Totem-pole PFC Converter Reference Design
TIDA-00961 — High frequency Critical-Conduction-Mode (CrM) Totem-pole power factor correction (PFC) is a simple approach for designing high density power solutions using GaN.  The TIDA-0961 reference design uses TI’s 600V GaN power stage, LMG3410, and TI’s Piccolo™ F280049 controller. This (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
22-W/in3, 93.1% peak efficiency, 100-W USB-PD 3.0 AC/DC adapter reference design with Si MOSFET
TIDA-010047 — This fully-tested reference design is a high-efficiency, high-power-density, AC/DC adapter solution with a wide input voltage range (100- to 240-V AC) for laptop adapters and smartphone charger applications. This design consists of a front-end transition-mode (TM) power factor correction (PFC (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High efficiency, ultra-wide input (20 VDC to 375 VDC) isolated power supply reference design
PMP30720 — This reference design uses the UCC28C42 boost controller and the UCC28780 active-clamp flyback controller to generate an isolated output of 24 V at 3.5 A over an ultra-wide input voltage range of 20 V to 375 V. The design also uses the UCC24612 synchronous rectifier controller on the secondary side (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High efficiency, 70-W AC/DC active clamp flyback reference design
PMP30631 — This reference design uses the UCC28780 active clamp flyback controller to generate an isolated output of 20 V @ 3.5 A over an input voltage rage of 90 Vac to 264 Vac. The design also uses the UCC24612 synchronous rectifier controller on the secondary side. Zero voltage switching (ZVS) ensures high (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High Efficiency, High Power Density Active Clamp Flyback Adapter with SJ FET Reference Design
PMP40328 — PMP40328 is a maximum 9V 5A reference design for high frequency and high density adapter applications. The solution implements a high efficiency active clamp flyback  controller UCC28780 and secondary rectifier controller UCC24612-2. The efficiency is around 90% at full load. Integrated input (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Cost optimized, < 1% accurate current sensing and protection for 3-phase inverter reference design
TIDA-010023 — This reference design demonstrates a cost optimized three-phase inverter leg (low-side shunt) current sensing solution with high accuracy and faster response for sensorless 2-shunt or 3-shunt field oriented control (FOC). This reference design demonstrates inverter leg current sensing with full (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Training series

View all TI training and videos

Videos

Demystifying active-clamp flyback loop compensation

This presentation demonstrates how to properly design the feedback loop of the active clamp flyback converter

Posted: 25-Jan-2018
Duration: 32:26

Related videos