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UCC27714

ACTIVE

4-A, 600-V half bridge gate driver

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Data sheet

UCC27714

ACTIVE
Data sheet Order now

Product details

Bus voltage (Max) (V) 600 Power switch MOSFET, IGBT Input VCC (Min) (V) 10 Input VCC (Max) (V) 18 Peak output current (A) 4 Rise time (ns) 15 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 10 Rating Catalog Number of channels (#) 2 Fall time (ns) 15 Prop delay (ns) 90 Iq (uA) 300 Input threshold TTL, CMOS Channel input logic Non-Inverting Negative voltage handling at HS pin (V) -8 Driver configuration CMOS Compatible, Dual, Non-Inverting, TTL Compatible
Bus voltage (Max) (V) 600 Power switch MOSFET, IGBT Input VCC (Min) (V) 10 Input VCC (Max) (V) 18 Peak output current (A) 4 Rise time (ns) 15 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 10 Rating Catalog Number of channels (#) 2 Fall time (ns) 15 Prop delay (ns) 90 Iq (uA) 300 Input threshold TTL, CMOS Channel input logic Non-Inverting Negative voltage handling at HS pin (V) -8 Driver configuration CMOS Compatible, Dual, Non-Inverting, TTL Compatible
SOIC (D) 14 52 mm² 8.65 x 6
  • High-Side, Low-Side Configuration, with Independent Inputs
  • Fully Operational up to 600 V (HS Pin)
  • Floating Channel Designed for Bootstrap Operation
  • Peak Output Current Capability of 4-A Sink 4-A Source at VDD = 15 V
  • Best-In-Class Propagation Delay (125-ns Maximum)
  • Best-In-Class Delay Matching (20-ns Maximum)
  • TTL and CMOS Compatible Input Logic
  • VDD Bias Supply Range of 10 V to 20 V
  • Bias UVLO Protection for Both Channels
  • Rail-to-Rail Drive
  • Robust Operation Under Negative Voltage Transients
  • High dv/dt Immunity (HS Pin)
  • Separated Grounds for Logic (VSS) and Driver (COM) with Capability to Sustain Voltage Difference
  • Optional Enable Function (Pin 4)
  • Outputs Held in LOW when Inputs Floating
  • Inputs and Enable Pin Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
  • High and Low Voltage Pins Separated for Maximum Creepage and Clearance
  • Negative Voltage Handling Capability on Input and Enable Pins
  • High-Side, Low-Side Configuration, with Independent Inputs
  • Fully Operational up to 600 V (HS Pin)
  • Floating Channel Designed for Bootstrap Operation
  • Peak Output Current Capability of 4-A Sink 4-A Source at VDD = 15 V
  • Best-In-Class Propagation Delay (125-ns Maximum)
  • Best-In-Class Delay Matching (20-ns Maximum)
  • TTL and CMOS Compatible Input Logic
  • VDD Bias Supply Range of 10 V to 20 V
  • Bias UVLO Protection for Both Channels
  • Rail-to-Rail Drive
  • Robust Operation Under Negative Voltage Transients
  • High dv/dt Immunity (HS Pin)
  • Separated Grounds for Logic (VSS) and Driver (COM) with Capability to Sustain Voltage Difference
  • Optional Enable Function (Pin 4)
  • Outputs Held in LOW when Inputs Floating
  • Inputs and Enable Pin Voltage Levels Not Restricted by VDD Pin Bias Supply Voltage
  • High and Low Voltage Pins Separated for Maximum Creepage and Clearance
  • Negative Voltage Handling Capability on Input and Enable Pins

UCC27714 is a 600-V high-side, low-side gate driver with 4-A source and 4-A sink current capability, targeted to drive power MOSFETs or IGBTs. The device comprises of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap supplies. The device features excellent robustness and noise immunity with capability to maintain operational logic at negative voltages of up to –8 VDC on HS pin (at VDD = 12 V).

The device accepts a wide range bias supply input from 10 V to 20 V and offers UVLO protection for both the VCC and HB bias supply pins. UCC27714 is available in SOIC-14 package and rated to operate from –40°C to 125°C.

UCC27714 is a 600-V high-side, low-side gate driver with 4-A source and 4-A sink current capability, targeted to drive power MOSFETs or IGBTs. The device comprises of one ground-referenced channel (LO) and one floating channel (HO) which is designed for operating with bootstrap supplies. The device features excellent robustness and noise immunity with capability to maintain operational logic at negative voltages of up to –8 VDC on HS pin (at VDD = 12 V).

The device accepts a wide range bias supply input from 10 V to 20 V and offers UVLO protection for both the VCC and HB bias supply pins. UCC27714 is available in SOIC-14 package and rated to operate from –40°C to 125°C.

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Technical documentation

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Type Title Date
* Data sheet UCC27714 High-Speed, 600-V High-Side Low-Side Gate Driver with 4-A Peak Output datasheet (Rev. B) PDF | HTML 08 Feb 2017
Application note External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application note Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Technical article How to achieve higher system robustness in DC drives, part 3: minimum input pulse 19 Sep 2018
Technical article How to achieve higher system robustness in DC drives, part 2: interlock and deadtime 30 May 2018
Technical article Boosting efficiency for your solar inverter designs 24 May 2018
Application note Bootstrap Circuitry Selection for Half Bridge Configurations 24 Apr 2018
Technical article How to achieve higher system robustness in DC drives, part 1: negative voltage 17 Apr 2018
White paper Redefining power management through high-voltage innovation 12 Nov 2015
EVM User's guide Using the UCC27714EVM-551 (Rev. A) 14 Sep 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCC27714EVM-551 — UCC27714 600W Phase Shifted Full Bridge Converter Evaluation Module

This 600W EVM was designed to demonstrate how the UCC28950 control IC, UCC27524A and UCC27714 gate drivers could be used in a phase shifted full bridge converter that achieves ZVS from 50 to 100% load. 

User guide: PDF
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Simulation model

UCC27714 PSpice Transient Model

SLUM460.ZIP (43 KB) - PSpice Model
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Simulation model

UCC27714 TINA-TI Transient Reference Design

SLUM494.TSC (201 KB) - TINA-TI Reference Design
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Simulation model

UCC27714 TINA-TI Transient Spice Model

SLUM493.ZIP (19 KB) - TINA-TI Spice Model
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Simulation model

UCC27714 Unencrypted PSpice Transient Model

SLUM636.ZIP (3 KB) - PSpice Model
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Schematic

UCC2771x Schematic Review Template

SLURB13.ZIP (63 KB)
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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