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DRV8351-SEP

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Strahlungstoleranter einfacher dreiphasiger Gate-Treiber mit Bootstrap-Dioden für 40 V

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Datenblatt

DRV8351-SEP

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Rating Space Architecture Gate driver Vs (min) (V) 5 Vs ABS (max) (V) 57.5 Operating temperature range (°C) -55 to 125
Rating Space Architecture Gate driver Vs (min) (V) 5 Vs ABS (max) (V) 57.5 Operating temperature range (°C) -55 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • 40V Three Phase Half-Bridge Gate driver
    • Drives N-Channel MOSFETs (NMOS)
    • Gate Driver Supply (GVDD): 5-15V
    • MOSFET supply (SHx) supports up to 40V
  • Radiation Performance
    • SEL, SEB, and SET resistant up to LET = 43 MeV-cm2 /mg
    • SET and SEFI characterized up to LET = 43 MeV-cm2 /mg
    • TID assured for every wafer lot up to 30 krad(Si)
    • TID characterized up to 30 krad(Si)
    • Cross conduction event is observed during SEE and SEB. Refer to SEE report for more details.
  • Space-enhanced plastic (space EP):
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication site
    • Extended Product Life Cycle
    • Product Traceability
  • Integrated Bootstrap Diodes
  • Supports Inverting and Non-Inverting INLx inputs
  • Bootstrap gate drive architecture
    • 750mA source current
    • 1.5- sink current
  • Low leakage current on SHx pins (<55µA)
  • Absolute maximum BSTx voltage up to 57.5V
  • Supports negative transients up to -22V on SHx
  • Fixed deadtime insertion of 200nS
  • Supports 3.3V and 5V logic inputs with 20V Abs max
  • 4nS typical propagation delay matching
  • Compact TSSOP package
  • Efficient system design with Power Blocks
  • Integrated protection features
    • BST undervoltage lockout (BSTUV)
    • GVDD undervoltage (GVDDUV)
  • 40V Three Phase Half-Bridge Gate driver
    • Drives N-Channel MOSFETs (NMOS)
    • Gate Driver Supply (GVDD): 5-15V
    • MOSFET supply (SHx) supports up to 40V
  • Radiation Performance
    • SEL, SEB, and SET resistant up to LET = 43 MeV-cm2 /mg
    • SET and SEFI characterized up to LET = 43 MeV-cm2 /mg
    • TID assured for every wafer lot up to 30 krad(Si)
    • TID characterized up to 30 krad(Si)
    • Cross conduction event is observed during SEE and SEB. Refer to SEE report for more details.
  • Space-enhanced plastic (space EP):
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication site
    • Extended Product Life Cycle
    • Product Traceability
  • Integrated Bootstrap Diodes
  • Supports Inverting and Non-Inverting INLx inputs
  • Bootstrap gate drive architecture
    • 750mA source current
    • 1.5- sink current
  • Low leakage current on SHx pins (<55µA)
  • Absolute maximum BSTx voltage up to 57.5V
  • Supports negative transients up to -22V on SHx
  • Fixed deadtime insertion of 200nS
  • Supports 3.3V and 5V logic inputs with 20V Abs max
  • 4nS typical propagation delay matching
  • Compact TSSOP package
  • Efficient system design with Power Blocks
  • Integrated protection features
    • BST undervoltage lockout (BSTUV)
    • GVDD undervoltage (GVDDUV)

DRV8351-SEP is a three phase half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8351-SEPD generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the high-side MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents.

The phase pins SHx are able to tolerate significant negative voltage transients; while high side gate driver supply BSTx and GHx can support higher positive voltage transients (57.5V) abs max voltage which improve the robustness of the system. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high sides through GVDD and BST undervoltage lockout.

DRV8351-SEP is a three phase half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8351-SEPD generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the high-side MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents.

The phase pins SHx are able to tolerate significant negative voltage transients; while high side gate driver supply BSTx and GHx can support higher positive voltage transients (57.5V) abs max voltage which improve the robustness of the system. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency. Undervoltage protection is provided for both low and high sides through GVDD and BST undervoltage lockout.
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Technische Dokumentation

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Typ Titel Datum
* Data sheet DRV8351-SEP: 40V Three-Phase BLDC Gate Driver datasheet (Rev. A) PDF | HTML 30 Apr 2025
* Radiation & reliability report DRV8351-SEP Single-Event Effects (SEE) Report PDF | HTML 22 Jan 2025
* Radiation & reliability report DRV8351-SEP Production Flow and Reliability Report PDF | HTML 21 Jan 2025
* Radiation & reliability report DRV8351-SEP Total Ionizing Dose (TID) Report PDF | HTML 12 Dez 2024

Design und Entwicklung

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Evaluierungsplatine

DRV8351EVM — DRV8351 – Evaluierungsmodul

Das DRV8351-SEP-Evaluierungsmodul (EVM) ist eine bürstenlose 3-phasige 30 A/DC-Ansteuerungsstufe auf Basis des DRV8351-SEP-Gate-Treibers für BLDC-Motoren. Der DRV8351-SEP enthält drei Dioden für den Bootstrap-Betrieb, ohne dass externe Dioden erforderlich sind. Das EVM enthält drei (...)
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