DS25BR110

AKTIV

LVDS-Puffer, 3,125 Gbit/s mit Empfangs-Equalization

Produktdetails

Function Buffer, Equalizer Protocols LVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 3125 Input signal CML, LVCMOS, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer, Equalizer Protocols LVDS Number of transmitters 1 Number of receivers 1 Signaling rate (Mbps) 3125 Input signal CML, LVCMOS, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGQ) 8 9 mm² (3 mm × 3 mm)
  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Four Levels of Receive Equalization Reduce ISI Jitter
  • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Four Levels of Receive Equalization Reduce ISI Jitter
  • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity.

The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.

The DS25BR110 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. A fully differential signal path ensures exceptional signal integrity and noise immunity.

The DS25BR110 features four levels of receive equalization (EQ), making it ideal for use as a receiver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count, and further minimize board space.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization datasheet (Rev. E) 14.04.2013
Anwendungshinweis Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls 29.10.2020
Anwendungshinweis Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 29.06.2019
Anwendungshinweis LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) 29.04.2013
Anwendungshinweis AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A) 26.04.2013
Benutzerhandbuch 3.125 Gbps LVDS Buffers with Pre-emphasis and Equalization User Guide 25.01.2012
Anwendungshinweis Extending the Signal Path Over Data Trans Lines Using LVDS Signal Conditioning 02.08.2007

Design und Entwicklung

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Evaluierungsplatine

DS25BR100EVK — LVDS-Einkanalpuffer-Familie, 3,125 Gbps, mit Preemphasis beim Senden und Entzerrung beim Empfangen

The DS25BR100EVK is an evaluation kit designed for demonstrating performance of the 3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-Emphasis (PE) and Receive Equalization (EQ) family (DS25BR100, DS25BR110 and DS25BR120). The evaluation kit provides all three devices on a single board and (...)

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Simulationsmodell

DS25BR110 IBIS Model

SNLM097.ZIP (12 KB) - IBIS-Modell
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