LM3881

AKTIV

Einfacher Stromversorgungssequenzer, 3 Schienen, mit einstellbarer Zeitverzögerung

Produktdetails

Supply voltage (min) (V) 2.7 Number of supplies monitored 3 Supply voltage (max) (V) 5.5 Iq (typ) (mA) 0.08 Number of sequenced outputs 3 Rating Catalog Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 2.7 Number of supplies monitored 3 Supply voltage (max) (V) 5.5 Iq (typ) (mA) 0.08 Number of sequenced outputs 3 Rating Catalog Operating temperature range (°C) -40 to 125
VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Easiest Method to Sequence Rails
  • Power-Up and Power-Down Control
  • Tiny Footprint
  • Low Quiescent Current of 80 µA
  • Input Voltage Range of 2.7 V to 5.5 V
  • Output Invert Feature
  • Timing Controlled by Small Value External
    Capacitor
  • Easiest Method to Sequence Rails
  • Power-Up and Power-Down Control
  • Tiny Footprint
  • Low Quiescent Current of 80 µA
  • Input Voltage Range of 2.7 V to 5.5 V
  • Output Invert Feature
  • Timing Controlled by Small Value External
    Capacitor

The LM3881 Simple Power Sequencer offers the easiest method to control power up and power down of multiple power supplies (switching or linear regulators). By staggering the start-up sequence, it is possible to avoid latch conditions or large inrush currents that can affect the reliability of the system.

Available in VSSOP-8 package, the Simple Sequencer contains a precision enable pin and three open-drain output flags. When the LM3881 is enabled, the three output flags will sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags will follow a reverse sequence during power down to avoid latch conditions. Time delays are defined using an external capacitor and the output flag states can be inverted by the user.

The LM3881 Simple Power Sequencer offers the easiest method to control power up and power down of multiple power supplies (switching or linear regulators). By staggering the start-up sequence, it is possible to avoid latch conditions or large inrush currents that can affect the reliability of the system.

Available in VSSOP-8 package, the Simple Sequencer contains a precision enable pin and three open-drain output flags. When the LM3881 is enabled, the three output flags will sequentially release, after individual time delays, thus permitting the connected power supplies to start up. The output flags will follow a reverse sequence during power down to avoid latch conditions. Time delays are defined using an external capacitor and the output flag states can be inverted by the user.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet LM3881 Simple Power Sequencer With Adjustable Timing datasheet (Rev. D) PDF | HTML 10 Dez 2014
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Technical article How to manage processor power during uncontrolled power off PDF | HTML 21 Jun 2018
Technical article Sequencing solutions: simple, reliable and cost-effective PDF | HTML 27 Sep 2017
Technical article A simple six-channel power-rail sequencing solution PDF | HTML 16 Nov 2015
Analog Design Journal Power-supply sequencing for FPGAs 24 Okt 2014
EVM User's guide AN-1785 LM3881 Power Sequencer Evaluation Board (Rev. C) 07 Mai 2013
Application note Power Supply Design Considerations for Modern FPGAs (Power Designer 121) 02 Feb 2010

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

LM3881EVAL — Evaluierungsplatine für den Power-Sequencer LM3881

The LM3881 evaluation board has been designed to connect directly to the power supplies of an existing system to enable sequencing. Upon enabling the device, the three open drain output flags will rise in sequential order, 1-2-3. Once the part is disabled, the shutdown sequence will occur in (...)

Benutzerhandbuch: PDF
Simulationstool

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PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese voll ausgestattete Design- und Simulationssuite verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Referenzdesigns

TIDA-01466 — Rauscharmes Netzteil-Referenzdesign mit geringer Spannung für Ultraschall-Frontend

This reference design is a power supply optimized specifically for providing power to eight 16-channel receive AFE ICs for ultrasound imaging systems. This design reduces part count while maximizing efficiency by using single-chip DC-DC converter + LDO combo regulators to set the LDO input just (...)
Design guide: PDF
Schaltplan: PDF
Referenzdesigns

TIDA-01568 — Referenzdesign für Stromversorgungssequenzierung mit 12mm x 12mm, 5 Schienen für Anwendungsprozessor

This reference design demonstrates a validated and cost competitive power sequencing solution for an application processor or a high performance control platform. This design supports 5 different voltage rails, optimized with layout space of 12 mm × 12 mm. The design is also capable of (...)
Design guide: PDF
Schaltplan: PDF
Referenzdesigns

TIDA-010011 — Referenzdesign für hocheffiziente Stromversorgungsarchitektur für Schutzrelais-Prozessormodul

This reference design showcases various power architectures for generating multiple voltage rails for an application processor module, requiring >1A load current and high efficiency . The required power supply is generated using 5-, 12- or 24-V DC input from the backplane. Power supplies are (...)
Design guide: PDF
Schaltplan: PDF
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
VSSOP (DGK) 8 Ultra Librarian

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