Produktdetails

Bits (#) 8 Data rate (max) (Mbps) 200 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 0.65 Vin (max) (V) 4.9 Vout (min) (V) 1.25 Vout (max) (V) 5.5 Applications GPIO, I2C, JTAG, MDIO, SDIO, SMBus, SPI, UART Features Output enable, Wettable flanks package Prop delay (ns) 2.2 Technology family LSF Supply current (max) (mA) 0.0015 Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 8 Data rate (max) (Mbps) 200 Topology Open drain, Push-Pull Direction control (typ) Auto-direction Vin (min) (V) 0.65 Vin (max) (V) 4.9 Vout (min) (V) 1.25 Vout (max) (V) 5.5 Applications GPIO, I2C, JTAG, MDIO, SDIO, SMBus, SPI, UART Features Output enable, Wettable flanks package Prop delay (ns) 2.2 Technology family LSF Supply current (max) (mA) 0.0015 Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5 VSSOP (DGS) 20 24.99 mm² 5.1 x 4.9
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.65 V ↔ 1.8/2.5/3.3/5 V
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up To 40-MHz up or down translation at 50 pF capacitive load
  • Allows bidirectional voltage-level translation between
    • 0.65 V ↔ 1.8/2.5/3.3/5 V
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low R ON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C operating temperature range

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels on each channel which makes it very flexible.

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I 2C, SMBus, and so forth). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30 pF capacitive load and up to 40-MHz up or down translation at 50 pF capacitive load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels on each channel which makes it very flexible.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet LSF0108 Channel Auto-Bidirectional Multi-Voltage Level Translator for Open-Drain datasheet (Rev. M) 21 Apr 2023
Application note Top Questions About Auto Bi-Direction LSF Family Translators PDF | HTML 26 Dez 2024
Application note Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators PDF | HTML 12 Jul 2024
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 Jul 2024
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 09 Jan 2024
Application brief Future-Proofing Your Level Shifter Design with TI's Dual Footprint Packages PDF | HTML 05 Sep 2023
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 19 Nov 2017
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 30 Okt 2017
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 30 Apr 2015
Application note Voltage-Level Translation With the LSF Family (Rev. B) 12 Mär 2015
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Selection guide Logic Guide (Rev. AC) PDF | HTML 01 Jun 1994

Design und Entwicklung

Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

Evaluierungsplatine

14-24-LOGIC-EVM — Generisches Logikprodukt-Evaluierungsmodul für 14-polige bis 24-polige D-, DB-, DGV-, DW-, DYY-, NS-

Das 14-24-LOGIC-EVM-Evaluierungsmodul (EVM) ist für die Unterstützung aller Logikgeräte konzipiert, die sich in einem 14-Pin- bis 24-Pin-D-, DW-, DB-, NS-, PW-, DYY- oder DGV-Gehäuse befinden.

Benutzerhandbuch: PDF | HTML
Evaluierungsplatine

LSF-EVM — 1 bis 8-Bit LSF-Übersetzerfamilie – Evaluierungsmodul

Die LSF-Gerätefamilie ist ein Pegelumsetzer, der einen Spannungsbereich von 0,95 V und 5 V unterstützt und bidirektionale Mehrspannungsumsetzung ohne Richtungspin ermöglicht.

Das LSF-EVM ist mit dem Baustein LSF0108PWR bestückt und verfügt über Kontaktflächenmuster, die mit den Bausteinen (...)

Benutzerhandbuch: PDF
Simulationsmodell

LSF0108 IBIS Model (Rev. A)

SDLM022A.ZIP (56 KB) - IBIS Model
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian
VSSOP (DGS) 20 Ultra Librarian

Bestellen & Qualität

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  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
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  • Werksstandort
  • Montagestandort

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