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TCA4311A

AKTIV

2-Bit bidirektionaler 2,7 bis 5,5-V-Hot-Swap-fähiger 400-kHz-I2C/SMBus-Puffer

Produktdetails

Features Buffer, Enable pin, Hot swap Frequency (max) (MHz) 0.4 VCCA (min) (V) 2.7 VCCA (max) (V) 5.5 VCCB (min) (V) 2.7 VCCB (max) (V) 5.5 Supply restrictions VCC Single Supply Rating Catalog Operating temperature range (°C) -40 to 85
Features Buffer, Enable pin, Hot swap Frequency (max) (MHz) 0.4 VCCA (min) (V) 2.7 VCCA (max) (V) 5.5 VCCB (min) (V) 2.7 VCCB (max) (V) 5.5 Supply restrictions VCC Single Supply Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • Operating Power-Supply Voltage Range of 2.7 V to 5.5 V
  • Supports Bidirectional Data Transfer of I2C Bus Signals
  • SDA and SCL Lines are Buffered Which Increases Fanout
  • 1-V Precharge on all SDA and SCL Lines Prevents Corruption During Live Board Insertion and Removal From Backplane
  • SDA and SCL Input Lines are Isolated From Outputs
  • Accommodates Standard Mode and Fast Mode I2C Devices
  • Improved Noise Immunity
  • Applications Include Hot Board Insertion and Bus Extension
  • Low ICC Chip Disable of < 1 µA
  • READY Open-Drain Output
  • Supports Clock Stretching, Arbitration, and Synchronization
  • Powered-Off High-Impedance I2C Pins
  • Open-Drain I2C Pins
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Operating Power-Supply Voltage Range of 2.7 V to 5.5 V
  • Supports Bidirectional Data Transfer of I2C Bus Signals
  • SDA and SCL Lines are Buffered Which Increases Fanout
  • 1-V Precharge on all SDA and SCL Lines Prevents Corruption During Live Board Insertion and Removal From Backplane
  • SDA and SCL Input Lines are Isolated From Outputs
  • Accommodates Standard Mode and Fast Mode I2C Devices
  • Improved Noise Immunity
  • Applications Include Hot Board Insertion and Bus Extension
  • Low ICC Chip Disable of < 1 µA
  • READY Open-Drain Output
  • Supports Clock Stretching, Arbitration, and Synchronization
  • Powered-Off High-Impedance I2C Pins
  • Open-Drain I2C Pins
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

The TCA4311A is a hot-swappable I2C bus buffer that supports I/O card insertion into a live backplane without corruption of the data and clock busses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, this device provides bidirectional buffering, keeping the backplane and card capacitances isolated. During insertion, the SDA and SCL lines are pre-charged to 1 V to minimize the current required to charge the parasitic capacitance of the chip.

When the I2C bus is idle, the TCA4311A can be put into shutdown mode by setting the EN pin low. When EN is high, the TCA4311A resumes normal operation. It also includes an open drain READY output pin, which indicates that the backplane and card sides are connected together. When READY is high, the SDAIN and SCLIN are connected to SDAOUT and SCLOUT. When the two sides are disconnected, READY is low.

Both the backplane and card may be powered with supply voltages ranging from 2.7 V to 5.5 V, with no restrictions on which supply voltage is higher.

The TCA4311A has standard open-drain I/Os. The size of the pull-up resistors to the I/Os depends on the system, but each side of this buffer must have a pull-up resistor. The device is designed to work with Standard Mode and Fast Mode I2C devices in addition to SMBus devices. Standard Mode I2C devices only specify 3 mA in a generic I2C system where Standard Mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used.

The TCA4311A is a hot-swappable I2C bus buffer that supports I/O card insertion into a live backplane without corruption of the data and clock busses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, this device provides bidirectional buffering, keeping the backplane and card capacitances isolated. During insertion, the SDA and SCL lines are pre-charged to 1 V to minimize the current required to charge the parasitic capacitance of the chip.

When the I2C bus is idle, the TCA4311A can be put into shutdown mode by setting the EN pin low. When EN is high, the TCA4311A resumes normal operation. It also includes an open drain READY output pin, which indicates that the backplane and card sides are connected together. When READY is high, the SDAIN and SCLIN are connected to SDAOUT and SCLOUT. When the two sides are disconnected, READY is low.

Both the backplane and card may be powered with supply voltages ranging from 2.7 V to 5.5 V, with no restrictions on which supply voltage is higher.

The TCA4311A has standard open-drain I/Os. The size of the pull-up resistors to the I/Os depends on the system, but each side of this buffer must have a pull-up resistor. The device is designed to work with Standard Mode and Fast Mode I2C devices in addition to SMBus devices. Standard Mode I2C devices only specify 3 mA in a generic I2C system where Standard Mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet TCA4311A Hot Swappable 2-Wire Bus Buffers datasheet (Rev. C) PDF | HTML 16 Aug 2018
Application note I2C Solutions for Hot Swap Applications (Rev. A) 31 Jan 2023
Application note Why, When, and How to use I2C Buffers 23 Mai 2018
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 07 Sep 2016
Application note Understanding the I2C Bus PDF | HTML 30 Jun 2015
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 15 Mai 2015
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 13 Feb 2015

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