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DS40MB200

ACTIVO

Multiplexor/búfer CML 2:1/1:2 dual de 4.0 Gbps con preénfasis de transmisión y ecualización de recep

Detalles del producto

Function Equalizer, Mux buffer Protocols CML, LVDS, LVPECL Number of transmitters 2, 4 Number of receivers 2, 4 Supply voltage (V) 3.3 Signaling rate (MBits) 4000 Input signal CML Output signal CML Rating Catalog Operating temperature range (°C) 0 to 85
Function Equalizer, Mux buffer Protocols CML, LVDS, LVPECL Number of transmitters 2, 4 Number of receivers 2, 4 Supply voltage (V) 3.3 Signaling rate (MBits) 4000 Input signal CML Output signal CML Rating Catalog Operating temperature range (°C) 0 to 85
WQFN (NJU) 48 49 mm² 7 x 7
  • 1-Gbps to 4-Gbps Low Jitter Operation
  • Fixed Input Equalization
  • Programmable Output Pre-Emphasis
  • Independent Switch and Line Side Pre-Emphasis
    Controls
  • Programmable Switch-Side Loopback Mode
  • On-Chip Terminations
  • 3.3-V Supply
  • ESD Rating of 6-kV HBM
  • 48-leadless WQFN Package (7 mm × 7 mm)
  • 0°C to +85°C Operating Temperature Range
  • 1-Gbps to 4-Gbps Low Jitter Operation
  • Fixed Input Equalization
  • Programmable Output Pre-Emphasis
  • Independent Switch and Line Side Pre-Emphasis
    Controls
  • Programmable Switch-Side Loopback Mode
  • On-Chip Terminations
  • 3.3-V Supply
  • ESD Rating of 6-kV HBM
  • 48-leadless WQFN Package (7 mm × 7 mm)
  • 0°C to +85°C Operating Temperature Range

The DS40MB200 device is a dual signal conditioning 2:1 multiplexer (MUX) and 1:2 fan-out buffer designed for use in backplane-redundancy applications. Signal conditioning features include continuous time linear equalization (CTLE) and programmable output pre-emphasis, extending data communication in FR4 backplanes at rates up to 4 Gbps. Each input stage has a fixed equalizer to reduce intersymbol interference distortion from board traces.

All output drivers have four selectable steps of pre-emphasis to compensate for transmission losses from long FR4 backplanes and reduce deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100-Ω differential terminating resistors. All drivers are internally terminated with 50 Ω to VCC.

The DS40MB200 device is a dual signal conditioning 2:1 multiplexer (MUX) and 1:2 fan-out buffer designed for use in backplane-redundancy applications. Signal conditioning features include continuous time linear equalization (CTLE) and programmable output pre-emphasis, extending data communication in FR4 backplanes at rates up to 4 Gbps. Each input stage has a fixed equalizer to reduce intersymbol interference distortion from board traces.

All output drivers have four selectable steps of pre-emphasis to compensate for transmission losses from long FR4 backplanes and reduce deterministic jitter. The pre-emphasis levels can be independently controlled for the line-side and switch-side drivers. The internal loopback paths from switch-side input to switch-side output enable at-speed system testing. All receiver inputs are internally terminated with 100-Ω differential terminating resistors. All drivers are internally terminated with 50 Ω to VCC.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DS40MB200 Dual 4-Gbps 2:1/1:2 CML MUX/Buffer With Transmit Pre-Emphasis and Receive Equalization datasheet (Rev. J) PDF | HTML 14 oct 2015
Application note AN-1398 Printed Circuit Board Design Techniques for DS40MB200 (Rev. A) 26 abr 2013
Application note Driving Signals Over XAUI Backplanes Using DS42MB100, DS40MB200, or DS42BR400 (Rev. B) 26 abr 2013
Application note Enabling Redundancy in Multi-Gigabit Links w/DS40MB200 Mux/Buffer (Rev. A) 26 abr 2013
Application note Setting Pre-Empha Level for DS40MB200 Dual 4Gb/s Mux/Buffer (Rev. C) 26 abr 2013

Diseño y desarrollo

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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Paquete Pasadores Descargar
WQFN (NJU) 48 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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