Inicio Interfaz Circuitos integrados LVDS, M-LVDS y PECL
Inicio
Interfaz
Circuitos integrados LVDS, M-LVDS y PECL

DS90C032

ACTIVO

Receptor de línea diferencial CMOS cuádruple LVDS

Haga su pedido ahora
Hoja de datos

Se encuentra disponible una versión más nueva de este producto

open-in-new Comparar alternativas
Pin por pin con la misma funcionalidad que el dispositivo comparado
DS90C032B ACTIVO Receptor de línea diferencial CMOS cuádruple LVDS Cost optimized and industrial temperature range option

DS90C032

ACTIVO
Haga su pedido ahora

Detalles del producto

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Signaling rate (Mbps) 155.5 Input signal LVDS Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm)
  • >155.5 Mbps (77.7 MHz) switching rates
  • Accepts small swing (350 mV) differential signal levels
  • Ultra low power dissipation
  • 600 ps maximum differential skew (5V, 25°C)
  • 6.0 ns maximum propagation delay
  • Industrial operating temperature range
  • Military operating temperature range option
  • Available in surface mount packaging (SOIC) and (LCCC)
  • Pin compatible with DS26C32A, MB570 (PECL), and 41LF (PECL)
  • Supports OPEN input fail-safe
  • Supports short and terminated input fail-safe with the addition of external failsafe biasing
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Conforms to ANSI/TIA/EIA-644 LVDS standard
  • Available to Standard Microcircuit Drawing (SMD) 5962-95834

All trademarks are the property of their respective owners.

  • >155.5 Mbps (77.7 MHz) switching rates
  • Accepts small swing (350 mV) differential signal levels
  • Ultra low power dissipation
  • 600 ps maximum differential skew (5V, 25°C)
  • 6.0 ns maximum propagation delay
  • Industrial operating temperature range
  • Military operating temperature range option
  • Available in surface mount packaging (SOIC) and (LCCC)
  • Pin compatible with DS26C32A, MB570 (PECL), and 41LF (PECL)
  • Supports OPEN input fail-safe
  • Supports short and terminated input fail-safe with the addition of external failsafe biasing
  • Compatible with IEEE 1596.3 SCI LVDS standard
  • Conforms to ANSI/TIA/EIA-644 LVDS standard
  • Available to Standard Microcircuit Drawing (SMD) 5962-95834

All trademarks are the property of their respective owners.

TheDS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

TheDS90C032 accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN, shorted, and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

TheDS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.

TheDS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

TheDS90C032 accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN, shorted, and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.

TheDS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.
filter Buscar otro/a Circuitos integrados LVDS, M-LVDS y PECL
Descargar Ver vídeo con transcripción Video

Documentación técnica

No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 5
Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos DS90C032 LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) 12/04/2013
Application brief How Far, How Fast Can You Operate LVDS Drivers and Receivers? 3/08/2018
Application brief How to Terminate LVDS Connections with DC and AC Coupling 16/05/2018
Nota sobre la aplicación AN-1110 LVDS Quad Dynamic I CC vs Frequency 15/05/2004
Nota sobre la aplicación An Overview of LVDS Technology 5/10/1998

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 16 Ultra Librarian
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene alguna pregunta sobre calidad, encapsulados o pedido de productos de TI, consulte el servicio de asistencia de TI. ​​​​​​​​​​​​​​

Videos