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MCU de automatización y control de motores en tiempo real

SM320F2812-HT

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MCU C2000™ de 32 bits para alta temperatura con memoria flash de 150 MHz, 256 KB, EMIF

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SM320F2812-HT

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Detalles del producto

CPU C28x Frequency (MHz) 150 Flash memory (kByte) 256 RAM (kByte) 36 ADC type 1 12-bit SAR Features 2-pin oscillator, CAN, CPU timers, External memory interface, McBSP, Military qualified, SPI, Single zone code security, UART, Watchdog timer UART 2 CAN (#) 1 PWM (Ch) 16 SPI 1 Operating temperature range (°C) -55 to 220 Rating High Temp Communication interface CAN, McBSP, SPI, UART Hardware accelerators CPU only Edge AI enabled Yes Nonvolatile memory (kByte) 256 Number of GPIOs 56
CPU C28x Frequency (MHz) 150 Flash memory (kByte) 256 RAM (kByte) 36 ADC type 1 12-bit SAR Features 2-pin oscillator, CAN, CPU timers, External memory interface, McBSP, Military qualified, SPI, Single zone code security, UART, Watchdog timer UART 2 CAN (#) 1 PWM (Ch) 16 SPI 1 Operating temperature range (°C) -55 to 220 Rating High Temp Communication interface CAN, McBSP, SPI, UART Hardware accelerators CPU only Edge AI enabled Yes Nonvolatile memory (kByte) 256 Number of GPIOs 56
DIESALE (KGD) — See data sheet CFP (HFG) 172 888.338025 mm² (— mm × — mm)
  • High-Performance Static CMOS Technology
    • 150 MHz (6.67 ns Cycle Time)
    • Low Power (1.8 V Core at 135 MHz, 1.9 V, Core at 150 MHz, 3.3 V I/O) Design
    • 3.3 V Flash Voltage
  • JTAG Boundary Scan SupportIEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
  • High-Performance 32 Bit CPU (TMS320C28x)
    • 16 × 16 and 32 x 32 MAC Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program Address Reach
    • 4M Linear Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • Flash Devices: Up to 128K × 16 Flash (Four 8K × 16 and Six 16K × 16 Sectors)
    • ROM Devices: Up to 128K × 16 ROM
    • 1K × 16 OTP ROM
    • L0 and L1: 2 Blocks of 4K × 16 Each Single-Access RAM (SARAM)
    • H0: 1 Block of 8K × 16 SARAM
    • M0 and M1: 2 Blocks of 1K × 16 Each SARAM
  • Boot ROM (4K × 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • 128 Bit Security Key/Lock
    • Protects Flash/ROM/OTP and L0/L1 SARAM
    • Prevents Firmware Reverse Engineering
  • Three 32 Bit CPU Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Multichannel Buffered Serial Port (McBSP) With SPI Mode
  • 12 Bit ADC, 16 Channels
    • 2 × 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 Individually Programmable, Multiplexed General-Purpose Input / Output (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Supports TMS320C24x/240x Instructions
    • Code Composer Studio IDE
    • DSP/BIOS
    • JTAG Scan Controllers [Texas Instruments (TI) or Third-Party]
    • Evaluation Modules
    • Broad Third-Party Digital Motor Control Support
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extreme (–55°C/220°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
    • Texas Instruments high temperature products utilize highly optimized silicon (die)
      solutions with design and process enhancements to maximize performance over
      extended temperatures.

(1) Custom temperature ranges available
  • High-Performance Static CMOS Technology
    • 150 MHz (6.67 ns Cycle Time)
    • Low Power (1.8 V Core at 135 MHz, 1.9 V, Core at 150 MHz, 3.3 V I/O) Design
    • 3.3 V Flash Voltage
  • JTAG Boundary Scan SupportIEEE Standard 1149.1-1990, IEEE Standard Test-Access Port
  • High-Performance 32 Bit CPU (TMS320C28x)
    • 16 × 16 and 32 x 32 MAC Operations
    • 16 × 16 Dual MAC
    • Harvard Bus Architecture
    • Atomic Operations
    • Fast Interrupt Response and Processing
    • Unified Memory Programming Model
    • 4M Linear Program Address Reach
    • 4M Linear Data Address Reach
    • Code-Efficient (in C/C++ and Assembly)
    • TMS320F24x/LF240x Processor Source Code Compatible
  • On-Chip Memory
    • Flash Devices: Up to 128K × 16 Flash (Four 8K × 16 and Six 16K × 16 Sectors)
    • ROM Devices: Up to 128K × 16 ROM
    • 1K × 16 OTP ROM
    • L0 and L1: 2 Blocks of 4K × 16 Each Single-Access RAM (SARAM)
    • H0: 1 Block of 8K × 16 SARAM
    • M0 and M1: 2 Blocks of 1K × 16 Each SARAM
  • Boot ROM (4K × 16)
    • With Software Boot Modes
    • Standard Math Tables
  • External Interface
    • Up to 1M Total Memory
    • Programmable Wait States
    • Programmable Read/Write Strobe Timing
    • Three Individual Chip Selects
  • Clock and System Control
    • Dynamic PLL Ratio Changes Supported
    • On-Chip Oscillator
    • Watchdog Timer Module
  • Three External Interrupts
  • Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
  • 128 Bit Security Key/Lock
    • Protects Flash/ROM/OTP and L0/L1 SARAM
    • Prevents Firmware Reverse Engineering
  • Three 32 Bit CPU Timers
  • Motor Control Peripherals
    • Two Event Managers (EVA, EVB)
    • Compatible to 240xA Devices
  • Serial Port Peripherals
    • Serial Peripheral Interface (SPI)
    • Two Serial Communications Interfaces (SCIs), Standard UART
    • Multichannel Buffered Serial Port (McBSP) With SPI Mode
  • 12 Bit ADC, 16 Channels
    • 2 × 8 Channel Input Multiplexer
    • Two Sample-and-Hold
    • Single/Simultaneous Conversions
    • Fast Conversion Rate: 80 ns/12.5 MSPS
  • Up to 56 Individually Programmable, Multiplexed General-Purpose Input / Output (GPIO) Pins
  • Advanced Emulation Features
    • Analysis and Breakpoint Functions
    • Real-Time Debug via Hardware
  • Development Tools Include
    • ANSI C/C++ Compiler/Assembler/Linker
    • Supports TMS320C24x/240x Instructions
    • Code Composer Studio IDE
    • DSP/BIOS
    • JTAG Scan Controllers [Texas Instruments (TI) or Third-Party]
    • Evaluation Modules
    • Broad Third-Party Digital Motor Control Support
  • Low-Power Modes and Power Savings
    • IDLE, STANDBY, HALT Modes Supported
    • Disable Individual Peripheral Clocks
  • APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extreme (–55°C/220°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
    • Texas Instruments high temperature products utilize highly optimized silicon (die)
      solutions with design and process enhancements to maximize performance over
      extended temperatures.

(1) Custom temperature ranges available

The SM320F2812 device, member of the C28xE DSP generation, is a highly integrated, high-performance solution for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document SM320F2812 is abbreviated as F2812.

The SM320F2812 device, member of the C28xE DSP generation, is a highly integrated, high-performance solution for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.

Throughout this document SM320F2812 is abbreviated as F2812.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos Digital Signal Processor. datasheet (Rev. B) 27/06/2011
* Errata SM320F2812-HT AVSSREFBG and AVDDREFBG Die Pad X-Center PDF | HTML 11/11/2021
* Informe de radiación y confiabilidad SM320F2812HFGS150 Reliability Report 13/08/2012

Diseño y desarrollo

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Sonda de depuración

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Sonda de depuración

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El XDS560v2 es el modelo de mayor rendimiento de la familia de sondas de depuración XDS560™ y es compatible tanto con el estándar JTAG tradicional (IEEE 1149.1) como con cJTAG (IEEE 1149.7).  Tenga en cuenta que no es compatible con la depuración por cable serie (SWD).

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Sonda de depuración

TMDSEMU560V2STM-UE — Sonda de depuración USB y ethernet de seguimiento del sistema XDS560v2

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

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Herramienta de programación de software

UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

UniFlash forma parte del amplio ecosistema de desarrollo CCStudio™ de TI y es una herramienta de software diseñada para programar la memoria flash integrada en los microcontroladores y dispositivos de conectividad inalámbrica de TI, así como la memoria flash integrada en los procesadores de TI. (...)

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
DIESALE (KGD) — Ultra Librarian
CFP (HFG) 172 Ultra Librarian
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