Inicio Interfaz Transceptores RS-232

SN75C189

ACTIVO

Receptor de línea cuádruple de baja potencia

Detalles del producto

Drivers per package 0 Receivers per package 4 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 1 Main supply voltage (nom) (V) 5 ESD HBM (kV) 0 Rating Catalog Operating temperature range (°C) 0 to 70
Drivers per package 0 Receivers per package 4 Logic voltage (min) (V) 5 Data rate (max) (Mbps) 1 Main supply voltage (nom) (V) 5 ESD HBM (kV) 0 Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8
  • Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28
  • Low Supply Current...420 uA Typ
  • Preset On-Chip Input Noise Filter
  • Built-in Input Hysteresis
  • Response and Threshold Control Inputs
  • Push-Pull Outputs
  • Functionally Interchangeable and Pin-to-Pin Compatible With Texas Instruments SN75189/SN75189A and Motorola MC1489/MC1489A
  • Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic (N) DIP
  • Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28
  • Low Supply Current...420 uA Typ
  • Preset On-Chip Input Noise Filter
  • Built-in Input Hysteresis
  • Response and Threshold Control Inputs
  • Push-Pull Outputs
  • Functionally Interchangeable and Pin-to-Pin Compatible With Texas Instruments SN75189/SN75189A and Motorola MC1489/MC1489A
  • Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic (N) DIP

The SN75C189 and SN75C189A are low-power, bipolar, quadruple line receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices have been designed to conform to TIA/EIA-232-F.

The SN75C189 has a 0.33-V typical hysteresis, compared with 0.97 V for the SN75C189A. Each receiver has provision for adjustment of the overall input threshold levels. This is achieved by choosing external series resistors and voltages to provide bias levels for the response-control pins. The output is in the high logic state if the input is open circuit or shorted to ground.

These devices have an on-chip filter that rejects input pulses of less than 1-us duration. An external capacitor can be connected from the control pins to ground to provide further input noise filtering for each receiver.

The SN75C189 and SN75C189A have been designed using low-power techniques in a bipolar technology. In most applications, these receivers interface to single inputs of peripheral devices such as UARTs, ACEs, or microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN75C189 and SN75C189A outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.

The SN75C189 and SN75C189A are characterized for operation from 0°C to 70°C.

The SN75C189 and SN75C189A are low-power, bipolar, quadruple line receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). These devices have been designed to conform to TIA/EIA-232-F.

The SN75C189 has a 0.33-V typical hysteresis, compared with 0.97 V for the SN75C189A. Each receiver has provision for adjustment of the overall input threshold levels. This is achieved by choosing external series resistors and voltages to provide bias levels for the response-control pins. The output is in the high logic state if the input is open circuit or shorted to ground.

These devices have an on-chip filter that rejects input pulses of less than 1-us duration. An external capacitor can be connected from the control pins to ground to provide further input noise filtering for each receiver.

The SN75C189 and SN75C189A have been designed using low-power techniques in a bipolar technology. In most applications, these receivers interface to single inputs of peripheral devices such as UARTs, ACEs, or microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN75C189 and SN75C189A outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.

The SN75C189 and SN75C189A are characterized for operation from 0°C to 70°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Quadruple Low-Power Line Receivers datasheet (Rev. G) 20 ene 2000

Diseño y desarrollo

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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Paquete Pasadores Descargar
PDIP (N) 14 Ver opciones
SOIC (D) 14 Ver opciones
SOP (NS) 14 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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