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Administración de potencia
Circuitos integrados multicanal (PMIC)

TPS65218D0

ACTIVO

Administración de energía integrada configurable (PMIC) para FPGA y SOC de ARM® Cortex™-A8/A9

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TPS65218D0

ACTIVO
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Detalles del producto

Processor supplier Texas Instruments Processor name Sitara AM335x, Sitara AM43x Product type Processor and FPGA Regulated outputs (#) 7 Step-down DC/DC converter 5 Step-up DC/DC converter 1 LDO 1 Vin (min) (V) 2.2 Vin (max) (V) 5.5 Vout (min) (V) 0.85 Vout (max) (V) 3.4 Iout (max) (A) 1.8 Configurability Factory programmable, Software configurable, User programmable Features Dynamic voltage scaling, Eco-mode, I2C control, Overcurrent protection, Power good, Power sequencing, Power supply and system monitoring, Thermal shutdown, UVLO adjustable Rating Catalog Operating temperature range (°C) -40 to 105 Step-down DC/DC controller 0 Step-up DC/DC controller 0 Iq (typ) (mA) 0.025 Switching frequency (max) (kHz) 2400 Switching frequency (typ) (kHz) 2400
Processor supplier Texas Instruments Processor name Sitara AM335x, Sitara AM43x Product type Processor and FPGA Regulated outputs (#) 7 Step-down DC/DC converter 5 Step-up DC/DC converter 1 LDO 1 Vin (min) (V) 2.2 Vin (max) (V) 5.5 Vout (min) (V) 0.85 Vout (max) (V) 3.4 Iout (max) (A) 1.8 Configurability Factory programmable, Software configurable, User programmable Features Dynamic voltage scaling, Eco-mode, I2C control, Overcurrent protection, Power good, Power sequencing, Power supply and system monitoring, Thermal shutdown, UVLO adjustable Rating Catalog Operating temperature range (°C) -40 to 105 Step-down DC/DC controller 0 Step-up DC/DC controller 0 Iq (typ) (mA) 0.025 Switching frequency (max) (kHz) 2400 Switching frequency (typ) (kHz) 2400
HTQFP (PHP) 48 81 mm² (9 mm × 9 mm) VQFN (RSL) 48 36 mm² (6 mm × 6 mm)
  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3 V Default, up to 1.6 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range From 1.8 V to 5.5 V
    • Adjustable Output Voltage Range From 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 3 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)
  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3 V Default, up to 1.6 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range From 1.8 V to 5.5 V
    • Adjustable Output Voltage Range From 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 3 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)

The TPS65218D0 is a single chip, power-management IC (PMIC) specifically designed to support the AM335x and AM438x line of processors in both portable (Li-Ion battery) and nonportable (5-V adapter) applications. The device is characterized across a –40°C to +105°C temperature range, making it suitable for various industrial applications.

The TPS65218D0 is specifically designed to provide power management for all the functionalities of the AM438x processor. The DC/DC converters DCDC1 through DCDC4 are intended to power the core, MPU, DDR memory, and 3.3-V analog and I/O, respectively. LDO1 provides the 1.8-V analog and I/O for the processor. GPIO1 and GPO2 allow for memory reset and GPIO3 allows for warm reset (335x only) of the DCDC1 and DCDC2 converters. The I2C interface allows the user to enable and disable all voltage regulators, load switches, and GPIOs. Additionally, UVLO and supervisor voltage thresholds, power-up sequence, and power-down sequence can be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored as well. The supervisor monitors DCDC1 through DCDC4 and LDO1. The supervisor has two settings, one for typical undervoltage tolerance (STRICT = 0b), and one for tight undervoltage and overvoltage tolerances (STRICT = 1b). A power-good signal indicates proper regulation of the five voltage regulators.

Three hysteretic step-down converters are targeted at providing power for the processor core, MPU, and DDRx memory. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 feature dynamic voltage scaling to provide power at all operating points of the processor. DCDC1 and DCDC2 also have programmable slew rates to help protect processor components. DCDC3 remains powered while the processor is in a sleep mode to maintain power to DDRx memory. Backup power provides two step-down converters for the tamper, RTC, or both domains of the processor if system power fails or is disabled. If both system power and coin-cell battery are connected to the PMIC, power is not drawn from the coin-cell battery. A separate power good signal monitors the backup converters. A battery backup monitor determines the power level of the coin-cell battery.

The TPS65218D0 device is available in a 48-pin VQFN package (6 mm × 6 mm, 0.4-mm pitch).

The TPS65218D0 is a single chip, power-management IC (PMIC) specifically designed to support the AM335x and AM438x line of processors in both portable (Li-Ion battery) and nonportable (5-V adapter) applications. The device is characterized across a –40°C to +105°C temperature range, making it suitable for various industrial applications.

The TPS65218D0 is specifically designed to provide power management for all the functionalities of the AM438x processor. The DC/DC converters DCDC1 through DCDC4 are intended to power the core, MPU, DDR memory, and 3.3-V analog and I/O, respectively. LDO1 provides the 1.8-V analog and I/O for the processor. GPIO1 and GPO2 allow for memory reset and GPIO3 allows for warm reset (335x only) of the DCDC1 and DCDC2 converters. The I2C interface allows the user to enable and disable all voltage regulators, load switches, and GPIOs. Additionally, UVLO and supervisor voltage thresholds, power-up sequence, and power-down sequence can be programmed through I2C. Interrupts for overtemperature, overcurrent, and undervoltage can be monitored as well. The supervisor monitors DCDC1 through DCDC4 and LDO1. The supervisor has two settings, one for typical undervoltage tolerance (STRICT = 0b), and one for tight undervoltage and overvoltage tolerances (STRICT = 1b). A power-good signal indicates proper regulation of the five voltage regulators.

Three hysteretic step-down converters are targeted at providing power for the processor core, MPU, and DDRx memory. The default output voltages for each converter can be adjusted through the I2C interface. DCDC1 and DCDC2 feature dynamic voltage scaling to provide power at all operating points of the processor. DCDC1 and DCDC2 also have programmable slew rates to help protect processor components. DCDC3 remains powered while the processor is in a sleep mode to maintain power to DDRx memory. Backup power provides two step-down converters for the tamper, RTC, or both domains of the processor if system power fails or is disabled. If both system power and coin-cell battery are connected to the PMIC, power is not drawn from the coin-cell battery. A separate power good signal monitors the backup converters. A battery backup monitor determines the power level of the coin-cell battery.

The TPS65218D0 device is available in a 48-pin VQFN package (6 mm × 6 mm, 0.4-mm pitch).
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TPS65219 ACTIVO Administración de energía integrada (PMIC) para procesadores Arm® Cortex®-A53 y FPGA TPS65219 has higher current capability, more LDOs, supports lower output voltages, has no Buck-Boost nor Coin Cell-backup support and a smaller package size

Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos TPS65218D0 Power Management for ARM Cortex-A8/A9 SOCs and FPGAs datasheet (Rev. B) PDF | HTML 28/09/2018
Nota sobre la aplicación Powering Processors and FPGAs With a Single Family of PMICs (Rev. A) 14/04/2020
Nota sobre la aplicación TPS6521815 Power Management IC (PMIC) for Industrial Applications (Rev. A) 28/02/2020
Guía del usuario Powering the AM335x, AM437x, and AM438x with TPS65218D0 (Rev. B) 27/02/2020
Nota sobre la aplicación How to Design Flexible Processor Power Systems Using PMICs (Rev. B) 27/01/2020
Application brief Powering the NXP i.MX 6Solo, 6DualLite with the TPS6521815 PMIC (Rev. A) PDF | HTML 9/12/2019
Application brief Powering the NXP i.MX 8M Mini and Nano with the TPS6521825 and LP873347 PMICs (Rev. B) PDF | HTML 9/12/2019
Application brief Powering the NXP i.MX 7 Processor with the TPS6521815 PMIC (Rev. A) PDF | HTML 9/12/2019
Nota sobre la aplicación AM335x PMIC Selection Guide (Rev. A) 19/09/2019
Nota sobre la aplicación Basic Calculations of a 4 Switch Buck-Boost Power Stage (Rev. B) 9/07/2018
Third party document Optimizing power delivery with PMICs 12/12/2017
Informe Simple power rail sequencing solutions for complex multi-rail systems 6/07/2016
Nota sobre la aplicación Basic Calculation of a Buck Converter's Power Stage (Rev. B) PDF | HTML 17/08/2015
Informe Advantages of PMIC converters with enhanced hysteretic-mode control 30/03/2015

Diseño y desarrollo

Soluciones de alimentación

Explore las soluciones que incluyan el TPS65218D0. TI ofrece soluciones de alimentación para sistemas en chip (SoC), procesadores, microcontroladores, sensores y matrices de compuertas programables de campo (FPGA), sean o no de TI.

Ver soluciones
Placa de evaluación

BOOSTXL-TPS65218 — BoosterPack de programación del cliente TPS65218

El TPS65218 Customer Programming BoosterPack utiliza una MSP430F5529 Launchpad para permitir la programación por parte del cliente de la memoria no volátil del CI de administración de potencia TPS65218D0. El BOOSTXL-TPS65218 incorpora un conector hembra para programar las unidades antes de (...)
Guía del usuario: PDF
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Placa de evaluación

TMDXEVM438X-EPOS — Módulo de evaluación AM438x de punto de venta electrónico (EPOS)

El módulo de evaluación (EVM) AM438x de punto de venta electrónico (EPOS) permite a los desarrolladores evaluar la familia de procesadores TI SitaraTM AM438x (AM4382, AM4384 y AM4388) y comenzar a construir aplicaciones de punto de venta (POS), como terminales de transacción financiera electrónica (...)
Guía del usuario: PDF
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Placa de evaluación

TPS65218EVM-100 — Módulo de evaluación TPS65218

The TPS65218EVM is a fully assembled platform for evaluating the performance of the TPS65218 power management device.

Guía del usuario: PDF | HTML
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GUI para el módulo de evaluación (EVM)

IPG-UI — IPG-UI EVM GUI (Windows Installer)

La GUI IPG-UI se puede usar para configurar varios dispositivos PMIC a fin de evaluar las características y el rendimiento de dichos dispositivos.  Esta GUI se creó mediante tecnologías basadas en web y admite la interacción con el hardware EVM mediante una placa (...)

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GUI para el módulo de evaluación (EVM)

IPG-UI-LINUX — IPG-UI EVM GUI (Linux Installer)

La GUI IPG-UI se puede usar para configurar varios dispositivos PMIC a fin de evaluar las características y el rendimiento de dichos dispositivos.  Esta GUI se creó mediante tecnologías basadas en web y admite la interacción con el hardware EVM mediante una placa (...)

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GUI para el módulo de evaluación (EVM)

IPG-UI-OSX — IPG-UI EVM GUI (OSX Installer)

La GUI IPG-UI se puede usar para configurar varios dispositivos PMIC a fin de evaluar las características y el rendimiento de dichos dispositivos.  Esta GUI se creó mediante tecnologías basadas en web y admite la interacción con el hardware EVM mediante una placa (...)

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GUI para el módulo de evaluación (EVM)

SLVC750 — BOOSTXL-TPS65218 IPG-UI Device Support File

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Modelo de simulación

TPS65218xx PSpice Transient Model

SLDM022.ZIP (1460 KB) - Modelo PSpice
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Diseño de referencia

TIDA-00478 — Diseño de referencia de alimentación de la serie Xilinx Zynq 7000 de FPGA con IC de administración d

Este diseño de referencia basado en TPS65218 es una solución de alimentación compacta e integrada para los sistemas en chip y matrices de puertas programables de campo (SoC/FPGA) Xilinx® Zynq® 7010 (perteneciente a la familia de productos Zynq® de la serie 7000). Este diseño muestra al (...)

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Diseño de referencia

TIDA-00606 — Diseño de referencia de potencia Altera Cyclone V

Este diseño de referencia basado en TPS65218 es una solución de potencia compacta e integrada para el SoC Altera® Cyclone® V (E, GX, GT) (de la familia de productos de la serie Cyclone®). Este diseño presenta al TPS65218 como un IC todo en uno que se usa para alimentar los carriles (...)

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TIDA-00607 — Diseño de referencia de potencia Altera MAX 10 FPGA

Este diseño de referencia es un diseño de alimentación compacto e integrado para el sistema en chip (SoC) MAX® 10 de Altera® (de la familia de productos de la serie MAX®). Este diseño muestra al TPS65218 como un circuito integrado (IC) todo en uno que se utiliza para alimentar los (...)

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Diseño de referencia

TIPA-050024 — Diseño de fuentes de alimentación AM335x, AM437x y AM438x con el PMIC TPS65218D0 para aplicaciones i

Este diseño de fuentes de alimentación describe el circuito integrado de administración de potencia (PMIC) optimizado para alimentar los procesadores AM335x y AM43x. La guía del usuario es una referencia para la conectividad entre el TPS65218D0 (PMIC) y el procesador AM335x, AM437x o AM438x. El (...)

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
HTQFP (PHP) 48 Ultra Librarian
VQFN (RSL) 48 Ultra Librarian
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