Convertidor de nivel suelo de dirección fija de 1 bit y ±80 V para uso automotriz

Detalles del producto

Rating Automotive Ground offset voltage (max) (V) 80 Bits (#) 1 Topology Push-Pull Applications GPIO Forward/reverse channels 1 forward / 0 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 250 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features AEC Q100, Partial power down (Ioff)
Rating Automotive Ground offset voltage (max) (V) 80 Bits (#) 1 Topology Push-Pull Applications GPIO Forward/reverse channels 1 forward / 0 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 250 Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features AEC Q100, Partial power down (Ioff)
WSON (DSE) 6 2.25 mm² 1.5 x 1.5
  • AEC-Q100 qualified for automotive applications
  • Supports DC shifts up to ±80V
  • AC Noise Rejection of 140VPP up to 1MHz
  • CMTI of 250V/µs
  • Low Prop Delay (<6ns)
  • Greater than 175Mbps
  • Low power consumption (0.6mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 2500V human-body model
    • 500V charged-device model
  • Package options provided:
    • DSE (WSON-6)
  • AEC-Q100 qualified for automotive applications
  • Supports DC shifts up to ±80V
  • AC Noise Rejection of 140VPP up to 1MHz
  • CMTI of 250V/µs
  • Low Prop Delay (<6ns)
  • Greater than 175Mbps
  • Low power consumption (0.6mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 2500V human-body model
    • 500V charged-device model
  • Package options provided:
    • DSE (WSON-6)

The TXG8010-Q1 is a 1-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG8010-Q1 family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V.

The TXG8010-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 140VPP up to 1MHz (Figure 7-4). This device can support multiple interfaces such as UART, GPIO, and JTAG.

The TXG8010-Q1 is a 1-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG8010-Q1 family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V.

The TXG8010-Q1 device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 140VPP up to 1MHz (Figure 7-4). This device can support multiple interfaces such as UART, GPIO, and JTAG.

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* Data sheet TXG8010-Q1 1-bit , ± 80V Ground-Level Translator datasheet PDF | HTML 11 jun 2025
Technical article Uneven grounds? Address offset challenges with novel ground-level translators (Rev. A) PDF | HTML 05 jun 2025
Application brief Not All Grounds Are 0V PDF | HTML 21 may 2025
Product overview TI's Latest Ground-Level Translators PDF | HTML 07 may 2025

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