DS90UB924-Q1
- Qualified for Automotive Applications AEC-Q100
- Device Temperature Grade 2: –40°C to
+105°C Ambient Operating Temperature
Range - Device HBM ESD Classification Level ±8 kV
- Device CDM ESD Classification Level C6
- Device Temperature Grade 2: –40°C to
- 5-MHz to 96-MHz Pixel Clock Support
- Bidirectional Control Channel Interface with I2C-
Compatible Serial Control Bus - Low EMI OpenLDI Video Output
- Supports High Definition (720p) Digital Video
- RGB888 + VS, HS, DE and I2S Audio Supported
- Up to 4 I2S Digital Audio Outputs for Surround
Sound Applications - 4 Bidirectional GPIO Channels With 2 Dedicated Pins
- Single 3.3-V Supply With 1.8-V or 3.3-V
Compatible LVCMOS I/O Interface - DC-Balanced and Scrambled Data with
Embedded Clock - Adaptive Cable Equalization
- Internal Pattern Generation
- Backward Compatible Modes
The DS90UB924-Q1 deserializer, in conjunction with a DS90UB921-Q1, DS90UB925Q-Q1, DS90UB927Q-Q1, DS90UB929-Q1, DS90UB949-Q1, or DS90UB947-Q1 serializer, provides a solution for distribution of digital video and audio within automotive infotainment systems. The device converts a high-speed serialized interface with an embedded clock, delivered over a single signal pair (FPD-Link III), to four LVDS data/control streams, one LVDS clock pair (OpenLDI), and I2S audio data. The serial bus scheme, FPD-Link III, supports high-speed forward channel data transmission and low-speed full duplex back channel communication over a single differential link. Consolidation of audio, video data and control over a single differential pair reduces the interconnect size and weight, while also eliminating skew issues and simplifying system design.
Adaptive input equalization of the serial input stream provides compensation for transmission medium losses and deterministic jitter. EMI is minimized by the use of low voltage differential signaling.
技術資料
| 上位の文書 | タイプ | タイトル | フォーマットオプション | 最新の英語版をダウンロード | 日付 | |
|---|---|---|---|---|---|---|
| * | データシート | DS90UB924-Q1 5-MHz to 96-MHz 24-bit Color FPD-Link III to OpenLDI Deserializer With Bidirectional Control Channel データシート | PDF | HTML | 2016/04/22 | ||
| ユーザー・ガイド | FPD-Link Margin Analysis Program (MAP) user's guide | 2019/01/14 |
設計と開発
その他のアイテムや必要なリソースを参照するには、以下のタイトルをクリックして詳細ページをご覧ください。
DS90UB924-Q1EVM — DS90UB924-Q1 FPD-Link III デシリアライザ評価基板
ALP — Analog LaunchPad Framework Utility
ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software
| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| WQFN (RHS) | 48 | Ultra Librarian |
購入と品質
推奨製品には、この TI 製品に関連するパラメータ、評価基板、またはリファレンス デザインが存在する可能性があります。