パッケージ情報
| パッケージ | ピン数 VQFN (RHA) | 40 |
| 動作温度範囲 (℃) 0 to 70 |
| パッケージ数量 | キャリア 2,500 | LARGE T&R |
TMDS141 の特徴
- Supports 2.25 Gbps Signaling Rate for up to 1080p Resolutions
Supporting 36-bits Per Pixel for Color Depth of 12-bits Per Color - Compatible with HDMI 1.3a
- Integrated Receiver Termination
- 8-dB Equalizer Compensates Losses from 5-m or Longer HDMI Cables
- Selectable Output De-Emphasis Supports 1-m HDMI Transmission
- I2C Repeater Isolates Bus Capacitance at Both Ends
- High Impedance Outputs When Disabled
- TMDS Inputs HBM ESD Protection Exceeds 6 kV
- 3.3-V Supply Operation
- 40-Pin QFN Package (RHA)
- ROHS Compatible and 260°C Reflow Rated
- Accepts AC Couple DisplayPort Dual-Mode Signals and Translates
Them into a HDMI1.3a Compatable TMDS Signal
TMDS141 に関する概要
The TMDS141 HDMI hider is designed to accommodate a 1-m HDMI cable between a HDMI connector and a receiver. The internal cable causes signal distortion to high-speed TMDS signals, as well as increasing capacitance to the DDC channel. Each TMDS141 contains four TMDS repeaters to transmit digital content with signaling rates of up to 2.25-Gbps, and an I2C repeater to link extended display identification data (EDID) reading and high-bandwidth digital content protection (HDCP) key exchange under I2C standard mode operations.
The device includes four TMDS compliant differential receivers with 50-Ω termination resistors and 3.3-V termination voltage integrated at each receiver input pin. External terminations are not required. A built-in frequency response equalization circuit, 8 dB at 825 MHz, compensates inter-symbol interference (ISI) losses from a 5-m or longer input cable link.
The device also includes four TMDS compliant differential drivers. A precision resistor is connected externally from the VSADJ pin to ground for setting the differential output voltage to be compliant with the TMDS standard. A selectable de-emphasis circuit is available via the PRE input to drive long PCB traces or cables. When PRE is high, the 3.5-dB high frequency gain offsets the losses due to the FR4 trace. PRE can be left open or kept low when the de-emphasis function is not desired.
With standard TMDS terminations at the outputs, all TMDS outputs are forced high-impedance when OE is set high. The I2C repeater isolates the buses without accumulating the capacitance of both sides. It allows DDC capacitance to be controlled under the desired load. The I2C outputs are high-impedance when device supply voltage is less than 1.5 V or I2CEN is low. The OVS pin, output voltage select, provides the flexibility of adjusting the output voltage level of the TSCL and TSDA side to optimize noise margins while interfacing to different HDMI receivers. The device is characterized for operation from 0°C to 70°C.