DS50PCI402

활성

이퀄라이제이션 및 디엠퍼시스 기능을 갖춘 2.5/5.0Gbps 4레인 PCI Express 리드라이버

제품 상세 정보

Type Redriver Protocols General purpose, PCIe1, PCIe2, sRIO Applications Backplane, Front Port, Peripheral I/O Number of channels 8 Speed (max) (Gbpp) 5 Rating Catalog Operating temperature range (°C) -10 to 85
Type Redriver Protocols General purpose, PCIe1, PCIe2, sRIO Applications Backplane, Front Port, Peripheral I/O Number of channels 8 Speed (max) (Gbpp) 5 Rating Catalog Operating temperature range (°C) -10 to 85
WQFN (NJY) 54 55 mm² (10 mm × 5.5 mm)
  • Input and Output signal conditioning increases PCIe reach in backplanes and cables
  • 0.09 UI of residual deterministic jitter at 5Gbps after 42” of FR4 (with Input EQ)
  • 0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ)
  • 0.09 UI of residual deterministic jitter at 5Gbps with 28” of FR4 (with Output DE)
  • 0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE)
  • Adjustable Transmit VOD 800 to 1200mVp-p
  • Automatic and manual Receiver Detection and input termination control circuitry
  • Automatic power management on an individual lane basis via SMBus
  • Adjustable electrical idle detect threshold.
  • Data rate optimized 3-stage equalization to 27 dB gain
  • Data rate optimized 6-level 0 to 12 dB transmit de-emphasis
  • Flow-thru pinout in 10mmx5.5mm 54-pin leadless WQFN package
  • Single supply operation at 2.5V
  • >6kV HBM ESD rating
  • -10 to 85°C operating temperature range

All trademarks are the property of their respective owners.

  • Input and Output signal conditioning increases PCIe reach in backplanes and cables
  • 0.09 UI of residual deterministic jitter at 5Gbps after 42” of FR4 (with Input EQ)
  • 0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ)
  • 0.09 UI of residual deterministic jitter at 5Gbps with 28” of FR4 (with Output DE)
  • 0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE)
  • Adjustable Transmit VOD 800 to 1200mVp-p
  • Automatic and manual Receiver Detection and input termination control circuitry
  • Automatic power management on an individual lane basis via SMBus
  • Adjustable electrical idle detect threshold.
  • Data rate optimized 3-stage equalization to 27 dB gain
  • Data rate optimized 6-level 0 to 12 dB transmit de-emphasis
  • Flow-thru pinout in 10mmx5.5mm 54-pin leadless WQFN package
  • Single supply operation at 2.5V
  • >6kV HBM ESD rating
  • -10 to 85°C operating temperature range

All trademarks are the property of their respective owners.

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.

The DS50PCI402 is a low power, 4 lane bidirectional buffer/equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

The transmitter de-emphasis level can be set by the user depending on the distance from the DS50PCI402 to the PCI Express endpoint. The DS50PCI402 contains PCI Express specific functions such as Transmit Idle, RX Detection, and Beacon signal pass through.

The device provides automatic receive detection circuitry which controls the input termination impedance. By automatically reflecting the current load impedance seen on the outputs back to the corresponding inputs the DS50PCI402 becomes completely transparent to both the PCIe root complex and endpoint. An internal rate detection circuit is included to detect if an incoming data stream is at Gen2 data rates, and adjusts the de-emphasis on it's output accordingly. The signal conditioning provided by the device allows systems to upgrade from Gen1 data rates to Gen2 without reducing their physical reach. This is true for FR4 applications such as backplanes, as well as cable interconnect.

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기술 자료

검색된 결과가 없습니다. 검색어를 지우고 다시 시도하세요.
2개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 2.5 / 5.0 Gbps 4 Lane PCI Express Repeater w/Equalization & De-Emphasis datasheet (Rev. H) 2013. 3. 4
사용 설명서 DS50PCI401EVK User Guide PCI Express SMA Evaluation Kit 2012. 2. 20

설계 및 개발

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패키지 CAD 기호, 풋프린트 및 3D 모델
WQFN (NJY) 54 Ultra Librarian

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