DS90UB913Q-Q1

활성

10MHz~100MHz 10/12비트 FPD-Link III 시리얼라이저

지금 주문하기

데이터 시트

document-pdfAcrobat DS90UB91xQ-Q1 10- to 100-MHz, 10- and 12-Bit DC-Balanced FPD-Link III Serializer and Deserializer With Bidirectional Control Channel datasheet (Rev. D) (영어) PDF | HTML

DS90UB913Q-Q1

활성

데이터 시트

지금 주문하기

제품 상세 정보

Applications

Advanced Driver Assistance Systems (ADAS)

Input compatibility

LVCMOS

Function

Serializer

Output compatibility

FPD-Link III LVDS

Color depth (bpp)

12

Features

Low-EMI Point-to-Point Communication

EMI reduction

LVDS

Diagnostics

BIST

Rating

Automotive

Operating temperature range (°C)

-40 to 105

Applications

Advanced Driver Assistance Systems (ADAS)

Input compatibility

LVCMOS

Function

Serializer

Output compatibility

FPD-Link III LVDS

Color depth (bpp)

12

Features

Low-EMI Point-to-Point Communication

EMI reduction

LVDS

Diagnostics

BIST

Rating

Automotive

Operating temperature range (°C)

-40 to 105

WQFN (RTV)

32

25 mm² (5 mm × 5 mm)

10-MHz to 100-MHz Input Pixel Clock Support
Single Differential Pair Interconnect
Programmable Data Payload:
- 10-bit Payload up to 100 MHz
- 12-bit Payload up to 75 MHz
Continuous Low Latency Bidirectional Control
Interface Channel With I²C Support at 400 kHz
2:1 Multiplexer to Choose Between Two Input
Imagers
Embedded Clock With DC-Balanced Coding to
Support AC-Coupled Interconnects
Capable of Driving up to 25 Meters Shielded
Twisted-Pair
Receive Equalizer Automatically Adapts for
Changes in Cable Loss
Four Dedicated General-Purpose Input/Output
Pins (GPIO) Available on Both Serializer and
Deserializer
LOCK Output Reporting Pin and AT-SPEED BIST
Diagnosis Feature to Validate Link Integrity
1.8-V, 2.8-V or 3.3-V Compatible Parallel Inputs
on Serializer
Single Power Supply at 1.8 V
ISO 10605 and IEC 61000-4-2 ESD Compliant
Automotive-Grade Product: AEC-Q100 Grade 2
Qualified
Temperature Range −40°C to +105°C
Small Serializer Footprint (5 mm × 5 mm)
EMI/EMC Mitigation on Deserializer
- Programmable Spread Spectrum (SSCG)
  Outputs
- Receiver Staggered Outputs

10-MHz to 100-MHz Input Pixel Clock Support
Single Differential Pair Interconnect
Programmable Data Payload:
- 10-bit Payload up to 100 MHz
- 12-bit Payload up to 75 MHz
Continuous Low Latency Bidirectional Control
Interface Channel With I²C Support at 400 kHz
2:1 Multiplexer to Choose Between Two Input
Imagers
Embedded Clock With DC-Balanced Coding to
Support AC-Coupled Interconnects
Capable of Driving up to 25 Meters Shielded
Twisted-Pair
Receive Equalizer Automatically Adapts for
Changes in Cable Loss
Four Dedicated General-Purpose Input/Output
Pins (GPIO) Available on Both Serializer and
Deserializer
LOCK Output Reporting Pin and AT-SPEED BIST
Diagnosis Feature to Validate Link Integrity
1.8-V, 2.8-V or 3.3-V Compatible Parallel Inputs
on Serializer
Single Power Supply at 1.8 V
ISO 10605 and IEC 61000-4-2 ESD Compliant
Automotive-Grade Product: AEC-Q100 Grade 2
Qualified
Temperature Range −40°C to +105°C
Small Serializer Footprint (5 mm × 5 mm)
EMI/EMC Mitigation on Deserializer
- Programmable Spread Spectrum (SSCG)
  Outputs
- Receiver Staggered Outputs

The DS90UB91xQ-Q1 chipset offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single differential pair. The DS90UB91xQ-Q1 chipsets incorporate differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer and deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This chipset is ideally suited for driving video data that requires up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

There is a multiplexer at the deserializer to choose between two input imagers. The deserializer can have only one active input imager. The primary video transport converts 10- and 12-bit data over a single high-speed serial stream, along with a separate low latency bidirectional control channel transport that accepts control information from an I²C port and is independent of video blanking period.

Using TI’s embedded-clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical bidirectional control channel information in both directions. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing paths, which reduces PCB layers, cable width, connector size and pins. In addition, the deserializer inputs provide adaptive equalization to compensate for loss from the media over longer distances. Internal DC-balanced encoding and decoding is used to support AC-coupled interconnects. The Serializer is offered in a 32-pin WQFN package and the deserializer is offered in a 48-pin WQFN package.

The DS90UB91xQ-Q1 chipset offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single differential pair. The DS90UB91xQ-Q1 chipsets incorporate differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer and deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This chipset is ideally suited for driving video data that requires up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

There is a multiplexer at the deserializer to choose between two input imagers. The deserializer can have only one active input imager. The primary video transport converts 10- and 12-bit data over a single high-speed serial stream, along with a separate low latency bidirectional control channel transport that accepts control information from an I²C port and is independent of video blanking period.

Using TI’s embedded-clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical bidirectional control channel information in both directions. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing paths, which reduces PCB layers, cable width, connector size and pins. In addition, the deserializer inputs provide adaptive equalization to compensate for loss from the media over longer distances. Internal DC-balanced encoding and decoding is used to support AC-coupled interconnects. The Serializer is offered in a 32-pin WQFN package and the deserializer is offered in a 48-pin WQFN package.

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기타 FPD-Link 시리얼라이저/디시리얼라이저 찾기

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기술 자료

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3개 모두 보기

상위 문서	유형	직함	형식 옵션	날짜
*	데이터 시트	DS90UB91xQ-Q1 10- to 100-MHz, 10- and 12-Bit DC-Balanced FPD-Link III Serializer and Deserializer With Bidirectional Control Channel datasheet (Rev. D)	PDF \| HTML	2015. 7. 31
	애플리케이션 노트	I2C Communication over DS90UB913/4 FPD Link-III with BCC		2013. 4. 22
	사용 설명서	DS90UB913Q Serializer and DS90UB914Q Deserializer Evaluation Kit		2012. 8. 8

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

애플리케이션 소프트웨어 및 프레임워크

ALP — Analog LaunchPad Framework Utility

To get started with Analog LaunchPad (ALP) software: Download and install the ALP Framework Utility. Add new device profiles and example scripts with the ALP-PROFILE-UPDATE tool.

지원되는 제품 및 하드웨어

다운로드 옵션

지원 소프트웨어

ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software

ALP Profile Update contains latest fixes and updates to ALP profiles. If you are installing for the first time please install ALP Profile Update after installing ALP Framework.

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