홈 인터페이스 고속 시리얼라이저/디시리얼라이저 FPD-Link 시리얼라이저/디시리얼라이저
홈
인터페이스
고속 시리얼라이저/디시리얼라이저
FPD-Link 시리얼라이저/디시리얼라이저

DS90UH981-Q1

활성

HDCP를 지원하는 4K DSI - FPD-Link IV 브리지 시리얼라이저

지금 주문하기
데이터 시트

DS90UH981-Q1

활성
데이터 시트 지금 주문하기

제품 상세 정보

Applications In-vehicle Infotainment (IVI) Input compatibility DSI Function Serializer Output compatibility FPD-Link IV LVDS Color depth (bpp) 30 Parallel video bandwidth (per port) (max) (Gbps) 10 Serial video bandwidth (per port) (max) (Gbps) 10.4 Features CRC, Coax or STP, Flexible GPIOs, HDCP, I2C Config, Line Fault Detection, Pattern Generation, Ultra-Low Data and Control Path Latency Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Applications In-vehicle Infotainment (IVI) Input compatibility DSI Function Serializer Output compatibility FPD-Link IV LVDS Color depth (bpp) 30 Parallel video bandwidth (per port) (max) (Gbps) 10 Serial video bandwidth (per port) (max) (Gbps) 10.4 Features CRC, Coax or STP, Flexible GPIOs, HDCP, I2C Config, Line Fault Detection, Pattern Generation, Ultra-Low Data and Control Path Latency Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
VQFNP (RTD) 64 81 mm² (9 mm × 9 mm)
  • Single or dual port MIPI DSI receiver
    • Compliant to D-PHY v1.2 and DSI v1.3.1
    • Packed 16/18/24/30-bit RGB and 16-bit YCbCr
    • Loosely packed 18-bit RGB and 20-bit 4:2:2
    • 1 clock lane and 1-4 configurable data lanes per D-PHY Port
    • Up to 2.5 Gbps/lane with skew calibration
    • Supports data lane swap and polarity inversion
    • Supports both burst and non-burst mode
    • SuperFrame Unpacking Capability
    • Suitable for 4K at 60Hz video resolution
  • FPD-Link IV interface
    • Supports 10.8/6.75/3.375Gbps per channel; Up to 21.6Gbps over dual channels
    • Coax/STP interconnect support
    • Port Splitting to enable Y-cable interfaces
  • Ultra-low latency control channel
    • Two I2C up to 1MHz (up to 3.4MHz for local bus access)
    • High speed GPIOs
  • Backwards compatible
    • Integrated HDCP v1.4 with on-chip keys
    • 720P 92x and 1080P/2K 94x product families
    • ADAS 936, 954, 960, 962, 9702, 9722 deserializers
  • Security and diagnostics
    • Voltage and temperature monitoring
    • Line Fault Detection
    • BIST and pattern generation
    • CRC and error diagnostics
    • Unique ID for counterfeit protection
    • ECC on control bits
  • Advanced link robustness and EMC control
    • Data scrambling
    • Spread spectrum clocking generation (SSCG)
  • Low power operation
    • 1.8V and 1.1V dual power supply
  • AEC-Q100 qualified for automotive applications
    • AEC-Q100 grade-level 2: −40℃ to +105℃
    • 64 pin QFN Wettable flanks 9mm x 9mm
    • ISO 10605 and IEC 61000-4-2 ESD compliant
  • Single or dual port MIPI DSI receiver
    • Compliant to D-PHY v1.2 and DSI v1.3.1
    • Packed 16/18/24/30-bit RGB and 16-bit YCbCr
    • Loosely packed 18-bit RGB and 20-bit 4:2:2
    • 1 clock lane and 1-4 configurable data lanes per D-PHY Port
    • Up to 2.5 Gbps/lane with skew calibration
    • Supports data lane swap and polarity inversion
    • Supports both burst and non-burst mode
    • SuperFrame Unpacking Capability
    • Suitable for 4K at 60Hz video resolution
  • FPD-Link IV interface
    • Supports 10.8/6.75/3.375Gbps per channel; Up to 21.6Gbps over dual channels
    • Coax/STP interconnect support
    • Port Splitting to enable Y-cable interfaces
  • Ultra-low latency control channel
    • Two I2C up to 1MHz (up to 3.4MHz for local bus access)
    • High speed GPIOs
  • Backwards compatible
    • Integrated HDCP v1.4 with on-chip keys
    • 720P 92x and 1080P/2K 94x product families
    • ADAS 936, 954, 960, 962, 9702, 9722 deserializers
  • Security and diagnostics
    • Voltage and temperature monitoring
    • Line Fault Detection
    • BIST and pattern generation
    • CRC and error diagnostics
    • Unique ID for counterfeit protection
    • ECC on control bits
  • Advanced link robustness and EMC control
    • Data scrambling
    • Spread spectrum clocking generation (SSCG)
  • Low power operation
    • 1.8V and 1.1V dual power supply
  • AEC-Q100 qualified for automotive applications
    • AEC-Q100 grade-level 2: −40℃ to +105℃
    • 64 pin QFN Wettable flanks 9mm x 9mm
    • ISO 10605 and IEC 61000-4-2 ESD compliant

DS90UH981-Q1 is a MIPI DSI to FPD-Link III/IV bridge device. In conjunction with an FPD-Link IV deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The DS90UH981-Q1 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The FPD-Link IV interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two FPD-Link IV lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. In backward compatible mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP-capable deserializer. In ADAS compatible mode, the device is interoperable with 936, 95x, 96x & 97x deserializers supporting resolutions up to 8MP+/40fps.

DS90UH981-Q1 is a MIPI DSI to FPD-Link III/IV bridge device. In conjunction with an FPD-Link IV deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The DS90UH981-Q1 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The FPD-Link IV interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two FPD-Link IV lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. In backward compatible mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link as well as HDCP v1.4 support when paired with an HDCP-capable deserializer. In ADAS compatible mode, the device is interoperable with 936, 95x, 96x & 97x deserializers supporting resolutions up to 8MP+/40fps.

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* 데이터 시트 DS90UH981-Q1 4K DSI to FPD-Link IV Bridge Serializer With HDCP datasheet PDF | HTML 2024. 2. 22

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

DS90UH981-Q1EVM — DS90UH981-Q1 DSI-FPD-Link IV 브리지 시리얼라이저 평가 모듈

DS90Ux981-Q1EVM은 DS90Ux981-Q1 MIPI DSI-FPD-Link IV 시리얼라이저용 평가 모듈입니다.  DS90Ux981-Q1은 60Hz에서 픽셀당 30비트로 4K를 포함한 초고화질 해상도를 지원합니다. 2 MIPI DSI 포트 입력은 레인당 최대 2.5Gbps의 속도를 지원하는 MIPI DSI v1.3.1 및 DPHY v1.2와 호환되며, FPD-Link 인터페이스는 FPD-Link IV 모드에서 채널당 최대 13.5Gbps 또는 FPD-Link III 모드에서 채널당 최대 3.675Gbps를 지원합니다. (...)
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평가 보드

DS90UH981-Q1MEVM — DS90UH981-Q1 DSI-FPD-Link IV 브리지 시리얼라이저 평가 모듈

DS90Ux981-Q1MEVM은 DS90Ux981-Q1 MIPI DSI-FPD-Link IV 시리얼라이저용 평가 모듈입니다.  DS90Ux981-Q1은 60Hz에서 픽셀당 30비트로 4K를 포함한 초고화질 해상도를 지원합니다. 2 MIPI DSI 포트 입력은 레인당 최대 2.5Gbps의 속도를 지원하는 MIPI DSI v1.3.1 및 DPHY v1.2와 호환되며, FPD-Link 인터페이스는 FPD-Link IV 모드에서 채널당 최대 13.5Gbps 또는 FPD-Link III 모드에서 채널당 최대 3.675Gbps를 (...)
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지원 소프트웨어

ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software

ALP Profile Update contains latest fixes and updates to ALP profiles. If you are installing for the first time please install ALP Profile Update after installing ALP Framework.
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