인터페이스 고속 시리얼라이저/디시리얼라이저 FPD-Link 시리얼라이저/디시리얼라이저

DS90UR905Q-Q1

활성

5~65MHz, 24비트 컬러 FPD-Link II 시리얼라이저

제품 상세 정보

Function Serializer Color depth (bps) 24 Input compatibility LVCMOS Output compatibility FPD-Link LVDS Features I2C Config Applications In-vehicle Infotainment (IVI) EMI reduction SSC Compatible Rating Automotive Operating temperature range (°C) -40 to 105
Function Serializer Color depth (bps) 24 Input compatibility LVCMOS Output compatibility FPD-Link LVDS Features I2C Config Applications In-vehicle Infotainment (IVI) EMI reduction SSC Compatible Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RHS) 48 49 mm² 7 x 7
  • 5- to 65-MHz PCLK support (140 Mbps to
    1.82 Gbps)
  • AC-Coupled STP interconnect cable up to 10 meters
  • Integrated terminations on serializer and deserializer
  • At speed link BIST mode and reporting pin
  • Optional I2C-compatible serial control bus
  • RGB888 + VS, HS, DE support
  • Power down mode minimizes power dissipation
  • 1.8-V or 3.3-V compatible LVCMOS I/O interface
  • Automotive-grade product: AEC-Q100 grade 2 qualified
  • >8-kV HBM and ISO 10605 ESD rating
  • Backward compatible mode for operation with older generation devices
  • SERIALIZER — DS90UR905Q-Q1
    • RGB888 + VS/HS/DE serialized to 1 Pair FPD-Link II
    • Randomizer/scrambler — DC-balanced data stream
    • Selectable output VOD and adjustable de-emphasis
  • DESERIALIZER — DS90UR906Q-Q1
    • FAST random data lock; no reference clock required
    • Adjustable input receiver equalization
    • LOCK (real time link status) reporting pin
    • EMI minimization on output parallel bus (SSCG)
    • Output slew control (OS)
  • 5- to 65-MHz PCLK support (140 Mbps to
    1.82 Gbps)
  • AC-Coupled STP interconnect cable up to 10 meters
  • Integrated terminations on serializer and deserializer
  • At speed link BIST mode and reporting pin
  • Optional I2C-compatible serial control bus
  • RGB888 + VS, HS, DE support
  • Power down mode minimizes power dissipation
  • 1.8-V or 3.3-V compatible LVCMOS I/O interface
  • Automotive-grade product: AEC-Q100 grade 2 qualified
  • >8-kV HBM and ISO 10605 ESD rating
  • Backward compatible mode for operation with older generation devices
  • SERIALIZER — DS90UR905Q-Q1
    • RGB888 + VS/HS/DE serialized to 1 Pair FPD-Link II
    • Randomizer/scrambler — DC-balanced data stream
    • Selectable output VOD and adjustable de-emphasis
  • DESERIALIZER — DS90UR906Q-Q1
    • FAST random data lock; no reference clock required
    • Adjustable input receiver equalization
    • LOCK (real time link status) reporting pin
    • EMI minimization on output parallel bus (SSCG)
    • Output slew control (OS)

The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects.

The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full
24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications).

The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided.

Serial transmission is optimized by a user-selectable de-emphasis, differential output level select features, and receiver equalization. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking compatibility. The deserializer may be configured to generate spread spectrum clock and data on its parallel outputs.

The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1 (deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100 grade 2 temperature range of –40°C to +105°C.

The DS90UR90xQ-Q1 chipset translates a parallel RGB video interface into a high-speed serialized interface over a single pair. This serial bus scheme makes system design easy by eliminating skew problems between clock and data, reducing the number of connector pins, reducing the interconnect size, weight, cost, and easing overall PCB layout. In addition, internal DC-balanced decoding is used to support AC-coupled interconnects.

The DS90UR905Q-Q1 serializer embeds the clock, balances the data payload, and level shifts the signals to high-speed, low voltage differential signaling. Up to 24 inputs are serialized, along with the three video control signals. This supports full
24-bit color or 18-bit color and 6 general-purpose signals (for example, Audio I2S applications).

The DS90UR906Q-Q1 deserializer recovers the data (RGB) and control signals and extracts the clock from the serial stream. The DS90UR906Q-Q1 is able to lock to the incoming data stream without the use of a training sequence or special SYNC patterns and does not require a reference clock. A link status (LOCK) output signal is provided.

Serial transmission is optimized by a user-selectable de-emphasis, differential output level select features, and receiver equalization. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking compatibility. The deserializer may be configured to generate spread spectrum clock and data on its parallel outputs.

The DS90UR905Q-Q1 serializer is offered in a 48-pin WQFN and the DS90UR906Q-Q1 (deserializer) is offered in a 60-pin WQFN package. They are specified over the automotive AEC-Q100 grade 2 temperature range of –40°C to +105°C.

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
DS90UB925Q-Q1 활성 양방향 제어 채널을 지원하는 5~85MHz 24비트 컬러 FPD-Link III 시리얼라이저 5-85MHz 24-Bit RGB FPD-Link III Serializer for Infotainment
DS90UB927Q-Q1 활성 양방향 제어 채널을 지원하는 5~85MHz 24비트 컬러 FPD-Link III 시리얼라이저 5-85MHz OpenLDI FPD-Link III Serializer for Infotainment

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
5개 모두 보기
유형 직함 날짜
* Data sheet DS90UR90xQ-Q1 5- to 65-MHz, 24-bit Color FPD-Link II Serializer and Deserializer datasheet (Rev. I) PDF | HTML 2019/10/03
Application note LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) 2013/04/29
Application note AN-1807 FPD-Link II Display SerDes Overview (Rev. B) 2013/04/26
Application note Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A) 2013/04/26
User guide DVI - FPD LINK II (DS90UR905Q/906Q) Demo Platform User Guide 2012/06/15

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

시뮬레이션 모델

DS90UR905Q IBIS Model

SNLM114.ZIP (74 KB) - IBIS Model
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 CAD 기호, 풋프린트 및 3D 모델
WQFN (RHS) 48 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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