DS91M047
- DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation
- Conforms to TIA/EIA-899 M-LVDS Standard
- Controlled Transition Times (2 ns typ) Minimize Reflections
- 8 kV ESD on M-LVDS Pins Protects Adjoining Components
- Flow-Through Pinout Simplifies PCB Layout
- Industrial Operating Temperature Range (−40°C to +85°C)
- Available in a Space Saving SOIC-16 Package
All trademarks are the property of their respective owners.
The DS91M047 is a high-speed quad M-LVDS line driver designed for driving clock or data signals to up to four multipoint networks.
M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multi-point applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs.
The DS91M047 accepts LVTTL/LVCMOS input levels and translates them to M-LVDS signal levels with transition times of greater than 1 ns. The device provides the DE and DE inputs that are ANDed together and control the TRI-STATE outputs. The DE and DE inputs are common to all four drivers.
The DS91M047 has a flow-through pinout for easy PCB layout. The DS91M047 provides a new alternative for high speed multipoint interface applications. It is packaged in a space saving SOIC-16 package.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | DS91M047 125 MHz Quad M-LVDS Line Driver datasheet (Rev. E) | 2013. 4. 16 | ||
| Application brief | How Far, How Fast Can You Operate MLVDS? | 2018. 8. 6 | |||
| 애플리케이션 노트 | Introduction to M-LVDS (TIA/EIA-899) (Rev. A) | 2013. 1. 3 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |