SCAN921260
- IEEE 1149.1 (JTAG) Compliant and At-Speed BIST Test Modes
- Deserializes One to Six BusLVDS Input Serial Data Streams With Embedded Clocks
- Seven Selectable Serial Inputs to Support N+1 Redundancy of Deserialized Streams
- Seventh Channel Has Single Pin Monitor Output That Reflects Input From Seventh Channel Input
- Parallel Clock Rate Up To 66 MHz
- On Chip Filtering for PLL
- High Impedance Inputs Upon Power Off (Vcc = 0V)
- Single Power Supply at +3.3V
- 196-Pin NFBGA Package (Low-Profile Ball Grid Array) Package
- Industrial Temperature Range Operation: −40 to +85
All trademarks are the property of their respective owners.
The SCAN921260 integrates six deserializer devices into a single chip. The SCAN921260 can simultaneously deserialize up to six data streams that have been serialized by the Texas Instruments SCAN921023 Bus LVDS serializer. The device also includes a seventh serial input channel that serves as a redundant input.
Each deserializer block in the SCAN921260 operates independently with its own clock recovery circuitry and lock-detect signaling.
The SCAN921260 uses a single +3.3V power supply with an estimated power dissipation of 1.2W at 3.3V with a PRBS-15 pattern. Refer to the Connection Diagrams for packaging information.
관심 가지실만한 유사 제품
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SCAN921260 X6 1:10 Deserializer with IEEE 1149.1 (JTAG) and at-speed BIST datasheet (Rev. F) | 2013. 4. 15 | ||
| 애플리케이션 노트 | How to Validate BLVDS SER/DES Signal Integrity Using an Eye Mask (Rev. A) | 2013. 4. 26 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| NFBGA (NZH) | 196 | Ultra Librarian |