SN65HVD52
- 1/8 Unit-load option available (up to 256 nodes on the bus)
- Bus-pin ESD protection exceeds 15 kV HBM
- Optional driver output transition times for signaling rates(1) of 1 Mbps, 5 Mbps and 25 Mbps
- Low-current standby mode < 1 µA
- Glitch-free power-up and power-down bus I/Os
- Bus idle, open, and short circuit failsafe
- Designed for RS-422 and RS485 networks
- 3.3-V Devices available, SN65HVD30-35 (1)
(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
The SN65HVD5X devices are 3-state differential line drivers and differential-input line receivers that operate with a 5-V power supply. Each driver and receiver has separate input and output pins for full-duplex bus communication designs. They are designed for balanced transmission lines and interoperation with ANSI TIA/EIA-485A, TIA/EIA-422-B, ITU-T v.11 and ISO 8482:1993 standard-compliant devices.
The SN65HVD50, SN65HVD51, and SN65HVD52 are fully enabled with no external enabling pins.
The SN65HVD53, SN65HVD54, and SN65HVD55 have active-high driver enables and active-low receiver enables. A low, less than 1 µA, standby current is achieved by disabling both the driver and receiver.
All devices are characterized for operation from –40°C to 85°C.
The high output feature of the SN65HVD5x provides more noise margin than the typical RS-485 drivers. The extra noise margin makes applications in long cable and harsh noise environments possible.
기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 | |
|---|---|---|---|---|---|---|
| * | 데이터 시트 | SN65HVD5x High Output Full-Duplex RS-485 Drivers and Receivers datasheet (Rev. F) | PDF | HTML | 2023. 3. 11 |
설계 및 개발
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RS485-FL-DPLX-EVM — RS-485 풀 듀플렉스 평가 모듈
The RS-485 full-duplex evaluation module (EVM) helps designers evaluate device performance, supporting fast development and analysis of data transmission systems using any of the SN65HVD147x, SN65HVD179x, SN65HVD3x, SN65HVD5x and SN65HVD7x full-duplex transceivers in a 14-pin D package. The (...)
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |