SN75ALS193
- Meets or exceeds ANSI standard EIA/TIA-422-B and EIA/TIA-423-A and ITU recommendations V.10 and V.11
- Designed for multipoint bus transmission on long bus lines in noisy environments
- 3-state outputs
- Common-mode input voltage range: –7 V to 7 V
- Input sensitivity: ±200 mV
- Input hysteresis: 120-mV typical
- High input impedance: 12-kΩ minimum
- Operates from single 5-V supply
- Low supply current requirement 35-mA maximum
- Improved speed and power version of the AM26LS32A
The SN75ALS193 is a monolithic quadruple line receiver with 3-state outputs designed using advanced low-power Schottky technology. This technology provides combined improvements in bar design, tooling production, and wafer fabrication. This, in turn, provides significantly lower power requirements and permits much higher data throughput than other designs. This device meets the specifications of ANSI Standards EIA/TIA-422-B and EIA/TIA-423-A and ITU Recommendations V.10 and V.11. It features 3-state outputs that permit direct connection to a bus-organized system with a fail-safe design that ensures the outputs will always be high if the inputs are open.
The device is optimized for balanced multipoint bus transmission at rates up to 20 megabits per second. The input features high input impedance, input hysteresis for increased noise immunity, and an input sensitivity of ± 200 mV over a common-mode input voltage range of –7 to 7 V. It also features active-high and active-low enable functions that are common to the four channels. The SN75ALS193 is designed for optimum performance when used with the ’ALS192 quadruple differential line driver.
The SN75ALS193 is characterized for operation from 0°C to 70°C.
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기술 자료
| 상위 문서 | 유형 | 직함 | 형식 옵션 | 최신 영어 버전 다운로드 | 날짜 |
|---|---|---|---|---|---|
| * | 데이터 시트 | SN75ALS193 Quadruple Differential Line Receiver datasheet (Rev. E) | PDF | HTML | 2023. 10. 16 |
설계 및 개발
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| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| PDIP (N) | 16 | Ultra Librarian |
주문 및 품질
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