인터페이스 HDMI, 디스플레이 포트 및 MIPI IC

TPD12S015A

활성

휴대용 애플리케이션용 스텝업 DC-DC, I2C 레벨 시프터 및 고속 ESD 클램프를 갖춘 HDMI 컴패니언 칩

제품 상세 정보

Type HDMI Companion Protocols HDMI Rating Catalog Number of channels 12 Supply voltage (V) 2.3, 5.5 Operating temperature range (°C) -40 to 85
Type HDMI Companion Protocols HDMI Rating Catalog Number of channels 12 Supply voltage (V) 2.3, 5.5 Operating temperature range (°C) -40 to 85
DSBGA (YFF) 28 5.4 mm² 1.8 x 3
  • Conforms to HDMI Compliance Tests Without Any External Components
  • Supports HDMI 1.3 and HDMI 1.4 Data Rate
  • Match Class D and Class C Pin Mapping
  • Excellent Matching Capacitance (0.05 pF) in Each Differential Signal Pair
  • Internal Boost Converter to Generate 5 V From a 2.3-V to 5.5-V Battery Voltage
  • Auto-Direction Sensing Level Shifting in the CEC, SDA, and SCL Paths
  • IEC 61000-4-2 (Level 4) System Level ESD Compliance
  • Improved Drop-In Replacement for the Industry Popular TPD12S015A
  • Industrial Temperature Range: –40°C to 85°C
  • Conforms to HDMI Compliance Tests Without Any External Components
  • Supports HDMI 1.3 and HDMI 1.4 Data Rate
  • Match Class D and Class C Pin Mapping
  • Excellent Matching Capacitance (0.05 pF) in Each Differential Signal Pair
  • Internal Boost Converter to Generate 5 V From a 2.3-V to 5.5-V Battery Voltage
  • Auto-Direction Sensing Level Shifting in the CEC, SDA, and SCL Paths
  • IEC 61000-4-2 (Level 4) System Level ESD Compliance
  • Improved Drop-In Replacement for the Industry Popular TPD12S015A
  • Industrial Temperature Range: –40°C to 85°C

The TPD12S015A device is an integrated HDMI companion chip solution. This device offers 8 low capacitance ESD clamps allowing HDMI 1.3/1.4 data rates. The 0.4-mm pitch DSBGA package pin mapping matches the HDMI Type D or Type C connectors. The integrated ESD clamps in monolithic silicon technology provide good matching between each differential signal pair. This provides an advantage over discrete ESD clamp solutions where variations between ESD clamps degrade the differential signal quality.

The TPD12S015A provides a regulated 5-V output (5VOUT) for sourcing the HDMI power line. The 5VOUT pin supplies minimum 55 mA to the HDMI receiver while meeting the HDMI 5VOUT specifications. The 5VOUT and the hot plug detect (HPD) circuitry are independent of the LS_OE control signal; they are controlled by the CT_CP_HPD pin. This independent control enables the detection scheme (5VOUT + HPD) to be active before enabling the HDMI link. The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug.

There are three noninverting bidirectional translation circuits for the SDA, SCL, and CEC lines; they are controlled by the LS_OE control signal. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6 V. On the B side, the SCL_B and SDA_B each have an internal 1.75-kΩ pullup connected to the regulated 5-V rail (5VOUT). The SCL and SDA pins meet the I2C specifications, and drive at least 750-pF loads which exceeds the HDMI cable specification. An LDO generates a 3.3-V internal rail for the CEC line operation when LS_OE = H & CT_CP_HPD = H. The CEC_B pin has a 26-kΩ pullup to this internal 3.3-V rail.

The TPD12S015A provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.56-mm × 2.76-mm DSBGA package.

The TPD12S015A device is an integrated HDMI companion chip solution. This device offers 8 low capacitance ESD clamps allowing HDMI 1.3/1.4 data rates. The 0.4-mm pitch DSBGA package pin mapping matches the HDMI Type D or Type C connectors. The integrated ESD clamps in monolithic silicon technology provide good matching between each differential signal pair. This provides an advantage over discrete ESD clamp solutions where variations between ESD clamps degrade the differential signal quality.

The TPD12S015A provides a regulated 5-V output (5VOUT) for sourcing the HDMI power line. The 5VOUT pin supplies minimum 55 mA to the HDMI receiver while meeting the HDMI 5VOUT specifications. The 5VOUT and the hot plug detect (HPD) circuitry are independent of the LS_OE control signal; they are controlled by the CT_CP_HPD pin. This independent control enables the detection scheme (5VOUT + HPD) to be active before enabling the HDMI link. The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug.

There are three noninverting bidirectional translation circuits for the SDA, SCL, and CEC lines; they are controlled by the LS_OE control signal. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6 V. On the B side, the SCL_B and SDA_B each have an internal 1.75-kΩ pullup connected to the regulated 5-V rail (5VOUT). The SCL and SDA pins meet the I2C specifications, and drive at least 750-pF loads which exceeds the HDMI cable specification. An LDO generates a 3.3-V internal rail for the CEC line operation when LS_OE = H & CT_CP_HPD = H. The CEC_B pin has a 26-kΩ pullup to this internal 3.3-V rail.

The TPD12S015A provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.56-mm × 2.76-mm DSBGA package.

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기술 문서

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모두 보기6
유형 직함 날짜
* Data sheet TPD12S015A HDMI Companion Chip With Step-Up DC-DC, I2C Level Shifter, and High-Speed ESD Clamps datasheet (Rev. D) PDF | HTML 2016/02/22
User guide Reading and Understanding an ESD Protection Data Sheet (Rev. A) PDF | HTML 2023/09/19
Application note ESD Protection Layout Guide (Rev. A) PDF | HTML 2022/04/07
White paper Designing USB for short-to-battery tolerance in automotive environments 2016/02/10
Analog Design Journal Design Considerations for System-Level ESD Circuit Protection 2012/09/25
EVM User's guide TPD12S015A EVM User's Guide 2011/06/17

설계 및 개발

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사용 설명서: PDF
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시뮬레이션 모델

TPD12S015A IBIS Model

SLLM149.ZIP (439 KB) - IBIS Model
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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패키지 다운로드
DSBGA (YFF) 28 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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