TS3USB30E
- VCC operation at 2.7V to 4.3V
- D+/D– pins tolerate up to 5.25V
- 1.8V compatible control-pin inputs
- IOFF supports partial power-down-mode operation
- RON = 10Ω maximum
- ΔRON = 0.35Ω typical
- Cio(ON) = 7.5pF typical
- Low power consumption (70nA maximum)
- –3dB bandwidth = 1400MHz typical
- Latch-up performance exceeds 100mA per JESD 78, Class II (1)
- ESD performance tested per JESD 22
- 8000V human-body model (A114-B, Class II)
- 1000V charged-device model (C101)
- ESD performance I/O port to GND (2)
- 15000V human-body model
- Packaged in 10-pin UQFN (1.8mm × 1.4mm)
(1)Except OE and S inputs
(2)High-voltage HBM is performed in addition to the standard HBM testing (A114-B, Class II) and applies to I/O ports tested with respect to GND only.
The TS3USB30E is a high-bandwidth 1:2 switch specially designed for the switching of high-speed USB 2.0 signals in handset and consumer applications, such as cell phones, digital cameras, and notebooks with hubs or controllers with limited USB I/Os. The wide bandwidth (1400MHz) of this switch allows signals to pass with minimum edge and phase distortion. The device multiplexes differential outputs from a USB host device to one of two corresponding outputs, or from two different hosts to one corresponding output. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. The TS3USB30E is designed for low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with various standards, such as high-speed USB 2.0 (480Mbps).
The TS3USB30E integrates ESD protection cells on all pins, is available in a tiny UQFN package (1.8mm × 1.4mm) or a VSSOP package, and is characterized over the free-air temperature range of –40°C to 85°C.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | TS3USB30E ESD-Protected, High-Speed USB 2.0 (480Mbps) 1:2 Multiplexer/Demultiplexer Switch With Single Enable datasheet (Rev. G) | PDF | HTML | 2024/10/28 |
| Application note | Passive Mux Selection Based On Bandwidth (Rev. A) | PDF | HTML | 2024/07/31 | |
| Application note | High-Speed Layout Guidelines for Signal Conditioners and USB Hubs | 2018/06/14 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 착수하기 (...)
TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| UQFN (RSW) | 10 | Ultra Librarian |
| VSSOP (DGS) | 10 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.