Home Logic & voltage translation Logic gates AND gates
Home
Logic & voltage translation
Logic gates
AND gates

SN74ALVC08

ACTIVE

4-ch, 2-input 1.65-V to 3.6-V ultra-high-speed (3 ns) AND gate

Order now
Data sheet

SN74ALVC08

ACTIVE
Data sheet Order now

Product details

Technology family ALVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 150 Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ALVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 150 Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) VQFN (RGY) 14 12.25 mm² (3.5 mm × 3.5 mm) TVSOP (DGV) 14 23.04 mm² (3.6 mm × 6.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm)
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 2.9 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Operates From 1.65 V to 3.6 V
  • Max tpd of 2.9 ns at 3.3 V
  • ±24-mA Output Drive at 3.3 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This quadruple 2-input positive-AND gate is designed for 1.65-V to 3.6-V VCCoperation.

The device performs the Boolean function Y = A • B or Y = (A + B)\ in positive logic.

This quadruple 2-input positive-AND gate is designed for 1.65-V to 3.6-V VCCoperation.

The device performs the Boolean function Y = A • B or Y = (A + B)\ in positive logic.
filter Find other AND gates
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device.
SN74LVC132A ACTIVE Quadruple positive-NAND gates with Schmitt-trigger inputs Voltage range 1.65V to 3.6V, average propagation delay 5.5ns, average drive strength 24mA
SN74LVC7001A ACTIVE Quadruple two-input 1.2V to 3.6V AND gates with Schmitt-trigger inputs Voltage range 1.65V to 3.6V, average propagation delay 5.5ns, average drive strength 24mA
SN74AUC08 ACTIVE 4-ch, 2-input 0.8-V to 2.7-V ultra-high-speed (2.4 ns) AND gate Voltage range 0.8V to 2.7V, average propagation delay 1.7ns, average drive strength 9mA
SN74LVC7002A ACTIVE 4-ch, 4-input, 1.65V to 3.6V, 24mA drive strength NOR gate with Schmitt-Trigger inputs Voltage range 1.65V to 3.6V, average propagation delay 5.5ns, average drive strength 24mA
SN74LVC7266A ACTIVE Quadruple two-input XNOR gates with Schmitt-trigger inputs Voltage range 1.65V to 3.6V, average propagation delay 5.5ns, average drive strength 24mA
SN74HC08 ACTIVE 4-ch, 2-input, 2-V to 6-V 5.2 mA drive strength AND gate Voltage range 2V to 6V, average propagation delay 20ns, average drive strength 8mA
SN74AC08 ACTIVE 4-ch, 2-input, 2V to 6V high-speed (7 ns) 24-mA drive strength AND gate Voltage range 2V to 6V, average propagation delay 7ns, average drive strength 24mA
SN74LVC7032A ACTIVE Four-channel two-input 1.2V to 3.6V OR gates with Schmitt-trigger inputs Voltage range 1.65V to 3.6V, average propagation delay 5.5ns, average drive strength 24mA
SN74AHC08 ACTIVE 4-ch, 2-input 2-V to 5.5-V high-speed (9 ns) AND gate Voltage range 2V to 5.5V, average propagation delay 12ns, average drive strength 9mA

Technical documentation

No results found. Please clear your search and try again.
View all 1
Top documentation Type Title Format options Date
* Data sheet SN74ALVC08 datasheet (Rev. I) Aug 31, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Simulation model

HSPICE Model for SN74ALVC08

SCEJ266.ZIP (98 KB) - HSpice model
Supported products & hardware
Simulation model

SN74ALVC08 Behavioral SPICE Model

SCEM767.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74ALVC08 IBIS Model (Rev. A)

SCEM238 (188 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos