The TPS56339 is a 4.5-V to 24-V input voltage range, 3-A synchronous buck converter. The device includes two integrated switching MOSFETs, internal loop compensation and 5-ms internal soft-start to reduce component count. By employing the SOT-23 (6) package, the device achieves the high power density and offers small footprint on PCB.
The TPS56339 employs Advanced Emulated Current Mode (AECM) control that can get fast transient response with fixed frequency. The internal adaptive loop adjustment eliminates the need for external compensation over a wide voltage output range.
Cycle-by-cycle current limit on the high-side protects the device in current overload conditions and is enhanced by a low-side sourcing current limit which prevents current runaway. Hiccup protection will be triggered under undervoltage and thermal shutdown protections.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | TPS56339 4.5-V to 24-V Input, 3-A Output Synchronous Buck Converter datasheet (Rev. A) | PDF | HTML | May 15, 2019 |
| White paper | Achieving Fast Load-Transient Response and Low EMI with the AECM DC/DC Control (Rev. A) | PDF | HTML | Oct 24, 2022 | |
| Application note | Non-Isolated Point-of-Load Solutions for Tiger Lake in PC Applications (Rev. B) | PDF | HTML | Apr 29, 2021 | |
| Selection guide | Buck Converter Quick Reference Guide (Rev. B) | Apr 8, 2021 | ||
| Application note | Non-Isolated Point-of-Load Solutions for Elkhart Lake in Industrial PC App. (Rev. A) | PDF | HTML | May 21, 2020 |
For additional terms or required resources, click any title below to view the detail page where available.
Advanced processors and platforms such as the Intel® Tiger Lake micro-architecture need point-of-load (POL) solutions for memory, low-power CPU rails, and 3.3V and 5V rail requirements from an array of rechargeable batteries, or a 12V input bus.
This power-supply design highlights the latest (...)
Advanced processors and platforms, such as the Intel® Elkhart Lake micro-architecture, need point-of-load (POL) solutions for memory, low-power CPU rails, and 3.3V and 5V rail requirements from an array of rechargeable batteries or a 12V input bus.
This power-supply design highlights the latest (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOT-23-THN (DDC) | 6 | Ultra Librarian |
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