Home Power management Linear & low-dropout (LDO) regulators

TPS723

ACTIVE

200-mA, negative, adjustable low-dropout voltage regulator with enable

Product details

Rating Catalog Vin (max) (V) -2.7 Vin (min) (V) -10 Iout (max) (A) 0.2 Output options Adjustable Output, Fixed Output, Negative Output Vout (max) (V) -1.2 Vout (min) (V) -9.75 Fixed output options (V) -2.5 Noise (µVrms) 60 PSRR at 100 KHz (dB) 48 Iq (typ) (mA) 0.13 Features Enable Thermal resistance θJA (°C/W) 85.6, 195 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) -2.7 Vin (min) (V) -10 Iout (max) (A) 0.2 Output options Adjustable Output, Fixed Output, Negative Output Vout (max) (V) -1.2 Vout (min) (V) -9.75 Fixed output options (V) -2.5 Noise (µVrms) 60 PSRR at 100 KHz (dB) 48 Iq (typ) (mA) 0.13 Features Enable Thermal resistance θJA (°C/W) 85.6, 195 Load capacitance (min) (µF) 2.2 Regulated outputs (#) 1 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 280 Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-23-THN (DDC) 5 8.12 mm² 2.9 x 2.8 WSON (DRV) 6 4 mm² 2 x 2
  • Input voltage range: –2.7V to –10V (–11V abs. max)
  • Available in –2.5V (fixed) and –1.186V to –10V (adjustable) versions
  • VOUT accuracy (across line, load and temperature):
    • ±1.6% for new chip
    • ±3.0% for legacy chip
  • Output current: Up to 200mA
  • Ultra-low noise: 60µVRMS (typ) with 10nF NR cap
  • Low IQ (new chip): 30µA at ILOAD = 0mA
  • High PSRR: 65dB (typ) at 1kHz, 40dB (typ) at 100kHz
  • Low dropout voltage:
    • 140mV (typ) at 200mA, –2.5V (new chip)
    • 280mV (typ) at 200mA, –2.5V (legacy chip)
  • Stable with a 2.2µF ceramic output capacitor
  • Less than 2µA (max) quiescent current in shutdown mode
  • Thermal and overcurrent protection
  • Operating junction temperature: –40°C to +125°C
  • Packages:
    • New chip:
      • 5-pin SOT-23 (DBV) [RθJA: 153.7°C/W]
    • Legacy chip:
      • 5-pin SOT-23 (DBV) [RθJA: 206.9°C/W]
      • 5-pin SOT-23-THIN (DDC) [RθJA: 194.8°C/W]
      • 6-pin WSON (DRV) [RθJA: 85.6°C/W]
  • Input voltage range: –2.7V to –10V (–11V abs. max)
  • Available in –2.5V (fixed) and –1.186V to –10V (adjustable) versions
  • VOUT accuracy (across line, load and temperature):
    • ±1.6% for new chip
    • ±3.0% for legacy chip
  • Output current: Up to 200mA
  • Ultra-low noise: 60µVRMS (typ) with 10nF NR cap
  • Low IQ (new chip): 30µA at ILOAD = 0mA
  • High PSRR: 65dB (typ) at 1kHz, 40dB (typ) at 100kHz
  • Low dropout voltage:
    • 140mV (typ) at 200mA, –2.5V (new chip)
    • 280mV (typ) at 200mA, –2.5V (legacy chip)
  • Stable with a 2.2µF ceramic output capacitor
  • Less than 2µA (max) quiescent current in shutdown mode
  • Thermal and overcurrent protection
  • Operating junction temperature: –40°C to +125°C
  • Packages:
    • New chip:
      • 5-pin SOT-23 (DBV) [RθJA: 153.7°C/W]
    • Legacy chip:
      • 5-pin SOT-23 (DBV) [RθJA: 206.9°C/W]
      • 5-pin SOT-23-THIN (DDC) [RθJA: 194.8°C/W]
      • 6-pin WSON (DRV) [RθJA: 85.6°C/W]

The TPS723 low-dropout (LDO) negative voltage regulator offers an ideal combination of features to support low noise analog and mixed-signal applications. The TPS723 supports input voltages from –10V to –2.7V, and outputs from –10V to –1.186V (in adjustable config). This regulator is stable with small, low-cost ceramic capacitors (up-to 2.2µF), and includes enable (EN) and noise reduction (NR) functions.

The TPS723 supports very tight DC accuracy of ±1.6% (new chip) over line, load and temperature range. The device responds quickly to line and load transients. The TPS723 supports a low dropout of typically 140mV (typ , new chip) at 200mA of load current. The device has built-in protection mechanism for over-current and overtemperature for reliable operation of the LDO.

The TPS723 supports low noise on output (60µVRMS with NR cap of 10nF) and available in a small 5-pin SOT-23 package,with performance fully specified over a temperature range of –40°C to +125°C.

The TPS723 low-dropout (LDO) negative voltage regulator offers an ideal combination of features to support low noise analog and mixed-signal applications. The TPS723 supports input voltages from –10V to –2.7V, and outputs from –10V to –1.186V (in adjustable config). This regulator is stable with small, low-cost ceramic capacitors (up-to 2.2µF), and includes enable (EN) and noise reduction (NR) functions.

The TPS723 supports very tight DC accuracy of ±1.6% (new chip) over line, load and temperature range. The device responds quickly to line and load transients. The TPS723 supports a low dropout of typically 140mV (typ , new chip) at 200mA of load current. The device has built-in protection mechanism for over-current and overtemperature for reliable operation of the LDO.

The TPS723 supports low noise on output (60µVRMS with NR cap of 10nF) and available in a small 5-pin SOT-23 package,with performance fully specified over a temperature range of –40°C to +125°C.

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Top documentation Type Title Format options Date
* Data sheet TPS723 200-mA, Low-Noise, High-PSRR, Negative Output Low-Dropout Linear Regulators datasheet (Rev. E) PDF | HTML 26 Mar 2026
Application note LDO Noise Demystified (Rev. B) PDF | HTML 18 Aug 2020
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
Application note LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 09 Aug 2017

Design & development

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Evaluation board

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User guide: PDF
Not available on TI.com
Simulation model

TPS72301 PSpice Transient Model

SLVM866.ZIP (21 KB) - PSpice Model
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TPS72301 Unencrypted PSpice Model

SLVMBZ8.ZIP (1 KB) - PSpice Model
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SLVM867.ZIP (22 KB) - PSpice Model
Simulation model

TPS72325 Unencrypted PSpice Model

SLVMBZ9.ZIP (1 KB) - PSpice Model
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Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 5 Ultra Librarian
SOT-23-THN (DDC) 5 Ultra Librarian
WSON (DRV) 6 Ultra Librarian

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