產品詳細資料

Bits (#) 6 Data rate (max) (Mbps) 24 Direction control (typ) Fixed-direction Vin (min) (V) 5 Vin (max) (V) 18 Vout (min) (V) 5 Vout (max) (V) 18 Applications GPIO Features High-voltage Prop delay (ns) 280 Technology family CD4000 Supply current (max) (mA) 5 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Bits (#) 6 Data rate (max) (Mbps) 24 Direction control (typ) Fixed-direction Vin (min) (V) 5 Vin (max) (V) 18 Vout (min) (V) 5 Vout (max) (V) 18 Applications GPIO Features High-voltage Prop delay (ns) 280 Technology family CD4000 Supply current (max) (mA) 5 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Independence of Power-Supply Sequence Considerations – VCC Can Exceed VDD;
    Input Signals Can Exceed Both VCC and VDD
  • Up and Down Level-Shifting Capability
  • Shiftable Input Threshold for Either CMOS or TTL Compatibility
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current of 1 µA at 18 V Over Full Package-Temperature Range:
    100 nA at 18 V and 25°C
  • 5 V, 10 V, and 15 V Parametric Ratings
  • Meets All Requirements of JEDEC Standard No. 13B,
    "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Additional temperature ranges are available – contact factory

  • Independence of Power-Supply Sequence Considerations – VCC Can Exceed VDD;
    Input Signals Can Exceed Both VCC and VDD
  • Up and Down Level-Shifting Capability
  • Shiftable Input Threshold for Either CMOS or TTL Compatibility
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current of 1 µA at 18 V Over Full Package-Temperature Range:
    100 nA at 18 V and 25°C
  • 5 V, 10 V, and 15 V Parametric Ratings
  • Meets All Requirements of JEDEC Standard No. 13B,
    "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Military (–55°C/125°C) Temperature Range(1)
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

(1) Additional temperature ranges are available – contact factory

CD4504B hex voltage level-shifter consists of six circuits which shift input signals from the VCC logic level to the VDD logic level. To shift TTL signals to CMOS logic levels, the SELECT input is at the VCC HIGH logic state. When the SELECT input is at a LOW logic state, each circuit translates signals from one CMOS level to another.

CD4504B hex voltage level-shifter consists of six circuits which shift input signals from the VCC logic level to the VDD logic level. To shift TTL signals to CMOS logic levels, the SELECT input is at the VCC HIGH logic state. When the SELECT input is at a LOW logic state, each circuit translates signals from one CMOS level to another.

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類型 標題 日期
* Radiation & reliability report CD4504BMPWREP Reliability Report 2012年 9月 12日
* Data sheet CMOS Hex Voltage-Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation datasheet 2008年 9月 3日

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