產品詳細資料

Resolution (bps) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating HiRel Enhanced Product Interpolation 1x Power consumption (typ) (mW) 290 Architecture Current Source Operating temperature range (°C) -55 to 125 Reference type Ext, Int
Resolution (bps) 10 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating HiRel Enhanced Product Interpolation 1x Power consumption (typ) (mW) 290 Architecture Current Source Operating temperature range (°C) -55 to 125 Reference type Ext, Int
TQFP (PFB) 48 81 mm² 9 x 9
  • 10-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 200 MSPS Update Rate
  • Single Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3):
    78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2 V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin Quad Flat Pack (TQFP)
  • 10-Bit Dual Transmit Digital-to-Analog Converter (DAC)
  • 200 MSPS Update Rate
  • Single Supply: 3 V to 3.6 V
  • High Spurious-Free Dynamic Range (SFDR): 80 dBc at 5 MHz
  • High Third-Order Two-Tone Intermodulation (IMD3):
    78 dBc at 15.1 MHz and 16.1 MHz
  • Independent or Single Resistor Gain Control
  • Dual or Interleaved Data
  • On-Chip 1.2 V Reference
  • Low Power: 290 mW
  • Power-Down Mode: 9 mW
  • Package: 48-Pin Thin Quad Flat Pack (TQFP)

The DAC5652 is a monolithic, dual channel, 10-bit, high speed, digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high impedance differential current output, suitable for single ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2 V reference voltage. Optionally, an external reference may be used.

The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652 has been specifically designed for a differential transformer coupled output with a 50 Ω doubly terminated load. For a 20 mA full scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5652 is available in a 48-pin thin quad flat pack (TQFP). Pin compatibility between family members provides 10-bit (DAC5652), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. Furthermore, the DAC5652 is pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the military temperature range of –55°C to 125°C.

The DAC5652 is a monolithic, dual channel, 10-bit, high speed, digital-to-analog converter (DAC) with on-chip voltage reference.

Operating with update rates of up to 200 MSPS, the DAC5652 offers exceptional dynamic performance, tight gain, and offset matching characteristics that make it suitable in either I/Q baseband or direct IF communication applications.

Each DAC has a high impedance differential current output, suitable for single ended or differential analog-output configurations. External resistors allow scaling of the full-scale output current for each DAC separately or together, typically between 2 mA and 20 mA. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2 V reference voltage. Optionally, an external reference may be used.

The DAC5652 has two 10-bit parallel input ports with separate clocks and data latches. For flexibility, the DAC5652 also supports multiplexed data for each DAC on one port when operating in the interleaved mode.

The DAC5652 has been specifically designed for a differential transformer coupled output with a 50 Ω doubly terminated load. For a 20 mA full scale output current, both a 4:1 impedance ratio (resulting in an output power of 4 dBm) and 1:1 impedance ratio transformer (–2 dBm output power) are supported.

The DAC5652 is available in a 48-pin thin quad flat pack (TQFP). Pin compatibility between family members provides 10-bit (DAC5652), 12-bit (DAC5662), and 14-bit (DAC5672) resolution. Furthermore, the DAC5652 is pin compatible to the DAC2900 and AD9763 dual DACs. The device is characterized for operation over the military temperature range of –55°C to 125°C.

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 3
類型 標題 日期
* Data sheet DAC5652-EP datasheet (Rev. C) 2013年 4月 24日
* VID DAC5652-EP VID V6206638 2016年 6月 21日
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TQFP (PFB) 48 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片