SN74ABT5402A

現行

具有 TTL 相容 CMOS 輸入和 3 態輸出的 12 通道、4.5-V 至 5.5-V 緩衝器

立即訂購

產品規格表

document-pdfAcrobat 12-Bit Line/Memory Drivers With 3-State Outputs datasheet (Rev. B) (英文)

SN74ABT5402A

現行

產品規格表

立即訂購

產品詳細資料

Technology family

ABT

Number of channels

12

IOL (max) (mA)

12

Supply current (max) (µA)

48000

IOH (max) (mA)

-12

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

ABT

Number of channels

12

IOL (max) (mA)

12

Supply current (max) (µA)

48000

IOH (max) (mA)

-12

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

SOIC (DW)

28

184.37 mm² (17.9 mm × 10.3 mm)

Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required
State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
Typical V_OLV (Output Undershoot) < 0.5 V at V_CC = 5 V, T_A = 25°C
Package Options Include Plastic Small-Outline (DW) Package and Ceramic Chip Carriers (FK) and DIPs (JT)
EPIC-IIB is a trademark of Texas Instruments Incorporated.

Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required
State-of-the-Art EPIC-II B^TM BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
Typical V_OLV (Output Undershoot) < 0.5 V at V_CC = 5 V, T_A = 25°C
Package Options Include Plastic Small-Outline (DW) Package and Ceramic Chip Carriers (FK) and DIPs (JT)
EPIC-IIB is a trademark of Texas Instruments Incorporated.

These 12-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all 12 outputs are in the high-impedance state.

The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT5402A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT5402A is characterized for operation from -40°C to 85°C.

These 12-bit buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all 12 outputs are in the high-impedance state.

The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT5402A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT5402A is characterized for operation from -40°C to 85°C.

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