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SN74HC244-EP

現行

具 3 態輸出的強化型產品 8 通道、2-V 至 6-V 緩衝器

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產品規格表

SN74HC244-EP

現行
產品規格表 立即訂購

產品詳細資料

Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 7.8 Supply current (max) (µA) 80 IOH (max) (mA) -7.8 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 8 IOL (max) (mA) 7.8 Supply current (max) (µA) 80 IOH (max) (mA) -7.8 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55° to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • High-Current Outputs Drive up to 15 LSTTL Loads

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of –55° to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product Change Notification
  • Qualification Pedigree
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • High-Current Outputs Drive up to 15 LSTTL Loads

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC244 are organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC244 are organized as two 4-bit buffers/drivers with separate output-enable (OE)\ inputs. When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
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類型 標題 日期
* Data sheet Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. A) 2004年 1月 6日
* VID SN74HC244-EP VID V6203607 2016年 6月 21日
* Radiation & reliability report SN74HC244QDWREP Reliability Report 2012年 3月 15日
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
Selection guide Logic Guide (Rev. AB) 2017年 6月 12日
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
User guide LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
User guide Signal Switch Data Book (Rev. A) 2003年 11月 14日
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
Application note Designing With Logic (Rev. C) 1997年 6月 1日
Application note Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
Application note Live Insertion 1996年 10月 1日
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
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  • 認證摘要
  • 進行中持續性的可靠性監測
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