SN74LS126A 不建議用於新設計
此產品將繼續向現有客戶提供。新設計應考量替代產品。
open-in-new 比較替代產品
功能相同,但引腳輸出與所比較的裝置不同
SN74AHCT126 現行 具有 TTL 相容 CMOS 輸入和 3 態輸出的 4 通道、4.5-V 至 5.5-V 緩衝器 Voltage range 4.5V to 5.5V, average propagation delay 9ns, average drive strength 8mA
功能與所比較的裝置相似
CD74HCT126 現行 具有 TTL 相容 CMOS 輸入和 3 態輸出的 4 通道、4.5-V 至 5.5-V 緩衝器 Voltage range 4.5V to 5.5V, average propagation delay 22ns, average drive strength 4mA

產品詳細資料

Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 4 IOL (max) (mA) 24 Supply current (max) (µA) 22000 IOH (max) (mA) -2.6 Input type Bipolar Output type 3-State Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 4 IOL (max) (mA) 24 Supply current (max) (µA) 22000 IOH (max) (mA) -2.6 Input type Bipolar Output type 3-State Features High speed (tpd 10-50ns), Input clamp diode Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8
  • Quad Bus Buffers
  • 3-State Outputs
  • Separate Control for Each Channel

The SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.

  • Quad Bus Buffers
  • 3-State Outputs
  • Separate Control for Each Channel

The SN54125, SN54126, SN74125, SN74126, and SN54LS126A are obsolete and are no longer supplied.

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G\ is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low.

These bus buffers feature three-state outputs that, when enabled, have the low impedance characteristics of a TTL output with additional drive capability at high logic levels to permit driving heavily loaded bus lines without external pullup resistors. When disabled, both output transistors are turned off, presenting a high-impedance state to the bus so the output will act neither as a significant load nor as a driver. The ’125 and ’LS125A devices’ outputs are disabled when G\ is high. The ’126 and ’LS126A devices’ outputs are disabled when G is low.

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類型 標題 日期
* Data sheet Quadruple Bus Buffers With 3-State Outputs datasheet (Rev. A) 2002年 2月 6日

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  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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