TAS5830
- Supports multiple output configurations
- 2 × 80W, BTL Mode(4Ω, 26V, THD+N=10%)
- 2 × 65W, BTL Mode(4Ω, 26V, THD+N=1%)
- 2 × 74W, BTL Mode(6Ω, 30V, THD+N=10%)
- 2 × 63W, BTL Mode(6Ω, 30V, THD+N=1%)
- 1 × 151W, PBTL Mode(3Ω, 30V, THD+N=10%)
- 1 × 131W, PBTL Mode(3Ω, 30V, THD+N=1%)
- Flexible audio I/O:
- Supports 32, 44.1, 48, 88.2, 96, 192kHz sample rates
- I2S, LJ, RJ, 4- 16 channels TDM input
- SDOUT for audio monitoring, sub-channel, or echo cancellation
- Supports 3-wire digital audio interface (no MCLK required)
- High-efficiency Class-D modulation
- > 90% power efficiency, 70mΩ RDSon
- Excellent audio performance:
- THD+N ≤ 0.03% at 1 W, 1kHz, PVDD = 12V
- SNR ≥ 110dB (A-weighted), ICN ≤ 40µVrms
- Flexible processing features
- 3-Band advanced DRC + 2 EQs + AGL + 2 EQs
- 15 BQs per channel, level meter
- 96kHz, 192kHz processor sampling
- Mixer, volume, dynamic EQ, output crossbar
- PVDD sensing and Class-H algorithm audio signal tracking
- Rattle suppression, Frequency limiter
- Flexible power supply configurations
- PVDD: 4.5V to 30V
- DVDD and I/O: 1.8V or 3.3V
- Excellent integrated self-protection:
- Over-current error (OCE)
- Cycle-by-cycle current limit supports 4 selectable OC levels
- Over-temperature warning (OTW)
- Over-temperature error (OTE)
- Under and over-voltage lock-out (UVLO/OVLO)
- PVDD voltage drop detection
- Easy system integration
- I2C Software Control (TAS5830 supports both Fast and Fast Plus mode) or Hardware Mode
- Fewer passives required compared to open-loop devices
The TAS5830 is a stereo high-performance, closed-loop Class-D with integrated audio processor and up to 192kHz audio support.
When setting the device into Hardware control mode, TAS5830 supports selecting switching frequency, analog gain, BTL/PBTL mode and cycle by cycle current limit threshold through pin configuration. This mode is designed to eliminate end system software driver integration efforts.
The TAS5830 also provides the DSP features Rattle suppression and Frequency limiter. Rattle suppression reduces the gain of the signal at frequencies that cause rattle through interaction with the speaker enclosure, improving sound quality. The frequency limiter process senses the input level, limits the gain of EQ dynamically and helps SPL without phase change.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | TAS5830 65W Stereo, Digital Input, High Efficiency Closed-Loop Class-D Amplifier with Class-H Algorithm datasheet | PDF | HTML | 2025/5/20 | ||
| 應用說明 | Mastering Audio Performance with TAS58xx Family of Class-D Audio Amplifiers | PDF | HTML | 2026/5/29 | |||
| 應用說明 | A Designer's Guide to Class-H Implementation in TAS5815, TAS5825P, TAS5827, TAS5828M, and TAS5830 Amplifiers | PDF | HTML | 2026/5/28 | |||
| Application brief | Speaker, TV, Soundbar Audio Amplifiers: Features, Benefits, and Selection Guide | PDF | HTML | 2026/3/11 | |||
| Application brief | The Future Speaks: Advancing Intelligent Robots With Texas Instruments' Audio Amplifiers | PDF | HTML | 2025/9/22 | |||
| 使用指南 | TAS5827, TAS5828M, and TAS5830 Process Flows | PDF | HTML | 2025/6/13 |
設計與開發
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TAS5830EVM — TAS5830 評估模組
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| HTSSOP (DAD) | 32 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。