產品詳細資料

DSP type 1 C3x DSP (max) (MHz) 75 CPU 32-bit Rating Catalog Operating temperature range (°C) 0 to 0
DSP type 1 C3x DSP (max) (MHz) 75 CPU 32-bit Rating Catalog Operating temperature range (°C) 0 to 0
LQFP (PGE) 144 484 mm² 22 x 22
  • High-Performance Floating-Point Digital Signal Processor (DSP):
    • TMS320VC33-150
      • 13-ns Instruction Cycle Time
      • 150 Million Floating-Point Operations Per Second (MFLOPS)
      • 75 Million Instructions Per Second (MIPS)
    • TMS320VC33-120
      • 17-ns Instruction Cycle Time
      • 120 MFLOPS
      • 60 MIPS
  • 34K × 32-Bit (1.1-Mbit) On-Chip Words of Dual-Access Static Random-Access Memory (SRAM) Configured in 2 × 16K Plus 2 × 1K Blocks to Improve Internal Performance
  • x5 Phase-Locked Loop (PLL) Clock Generator
  • Very Low Power: < 200 mW @ 150 MFLOPS
  • 32-Bit High-Performance CPU
  • 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations
  • Four Internally Decoded Page Strobes to Simplify Interface to I/O and Memory Devices
  • Boot-Program Loader
  • EDGEMODE Selectable External Interrupts
  • 32-Bit Instruction Word, 24-Bit Addresses
  • Eight Extended-Precision Registers
  • On-Chip Memory-Mapped Peripherals:
    • One Serial Port
    • Two 32-Bit Timers
    • Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation
  • Fabricated Using the 0.18-µm (leff-Effective Gate Length) TImeline™ Technology by Texas Instruments (TI)
  • 144-Pin Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
  • Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • Two Low-Power Modes
  • Two- and Three-Operand Instructions
  • Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle
  • Block-Repeat Capability
  • Zero-Overhead Loops With Single-Cycle Branches
  • Conditional Calls and Returns
  • Interlocked Instructions for Multiprocessing Support
  • Bus-Control Registers Configure Strobe-Control Wait-State Generation
  • 1.8-V (Core) and 3.3-V (I/O) Supply Voltages
  • On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG)

IEEE Standard 1149.1-1990 Standard-Test-Access Port
TImeline is a trademark of Texas Instruments.
Other trademarks are the property of their respective owners.

  • High-Performance Floating-Point Digital Signal Processor (DSP):
    • TMS320VC33-150
      • 13-ns Instruction Cycle Time
      • 150 Million Floating-Point Operations Per Second (MFLOPS)
      • 75 Million Instructions Per Second (MIPS)
    • TMS320VC33-120
      • 17-ns Instruction Cycle Time
      • 120 MFLOPS
      • 60 MIPS
  • 34K × 32-Bit (1.1-Mbit) On-Chip Words of Dual-Access Static Random-Access Memory (SRAM) Configured in 2 × 16K Plus 2 × 1K Blocks to Improve Internal Performance
  • x5 Phase-Locked Loop (PLL) Clock Generator
  • Very Low Power: < 200 mW @ 150 MFLOPS
  • 32-Bit High-Performance CPU
  • 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations
  • Four Internally Decoded Page Strobes to Simplify Interface to I/O and Memory Devices
  • Boot-Program Loader
  • EDGEMODE Selectable External Interrupts
  • 32-Bit Instruction Word, 24-Bit Addresses
  • Eight Extended-Precision Registers
  • On-Chip Memory-Mapped Peripherals:
    • One Serial Port
    • Two 32-Bit Timers
    • Direct Memory Access (DMA) Coprocessor for Concurrent I/O and CPU Operation
  • Fabricated Using the 0.18-µm (leff-Effective Gate Length) TImeline™ Technology by Texas Instruments (TI)
  • 144-Pin Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
  • Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • Two Low-Power Modes
  • Two- and Three-Operand Instructions
  • Parallel Arithmetic/Logic Unit (ALU) and Multiplier Execution in a Single Cycle
  • Block-Repeat Capability
  • Zero-Overhead Loops With Single-Cycle Branches
  • Conditional Calls and Returns
  • Interlocked Instructions for Multiprocessing Support
  • Bus-Control Registers Configure Strobe-Control Wait-State Generation
  • 1.8-V (Core) and 3.3-V (I/O) Supply Voltages
  • On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG)

IEEE Standard 1149.1-1990 Standard-Test-Access Port
TImeline is a trademark of Texas Instruments.
Other trademarks are the property of their respective owners.

The TMS320VC33 DSP is a 32-bit, floating-point processor manufactured in 0.18-µm four-level-metal CMOS (TImeline) technology. The TMS320VC33 is part of the TMS320C3x generation of DSPs from Texas Instruments.

The TMS320C3x’s internal busing and special digital-signal-processing instruction set have the speed and flexibility to execute up to 150 million floating-point operations per second (MFLOPS). The TMS320VC33 optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

The TMS320VC33 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short machine-cycle time. High performance and ease of use are the results of these features.

General-purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and externally generated wait states, one external interface port, two timers, one serial port, and multiple-interrupt structure. The TMS320C3x supports a wide variety of system applications from host processor to dedicated coprocessor. High-level-language support is easily implemented through a register-based architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported floating-point arithmetic.

The TMS320VC33 is a superset of the TMS320C31. Designers now have an additional 1M bits of on-chip SRAM, a maximum throughput of 150 MFLOPS, and several I/O enhancements that allow easy upgrades to current systems or creation of new baselines. This data sheet provides information required to fully utilize the new features of the TMS320VC33 device. For general TMS320C3x architecture and programming information, see the TMS320C3x User’s Guide (literature number SPRU031).

The TMS320VC33 DSP is a 32-bit, floating-point processor manufactured in 0.18-µm four-level-metal CMOS (TImeline) technology. The TMS320VC33 is part of the TMS320C3x generation of DSPs from Texas Instruments.

The TMS320C3x’s internal busing and special digital-signal-processing instruction set have the speed and flexibility to execute up to 150 million floating-point operations per second (MFLOPS). The TMS320VC33 optimizes speed by implementing functions in hardware that other processors implement through software or microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.

The TMS320VC33 can perform parallel multiply and ALU operations on integer or floating-point data in a single cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs, internal dual-access memories, one DMA channel supporting concurrent I/O, and a short machine-cycle time. High performance and ease of use are the results of these features.

General-purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and externally generated wait states, one external interface port, two timers, one serial port, and multiple-interrupt structure. The TMS320C3x supports a wide variety of system applications from host processor to dedicated coprocessor. High-level-language support is easily implemented through a register-based architecture, large address space, powerful addressing modes, flexible instruction set, and well-supported floating-point arithmetic.

The TMS320VC33 is a superset of the TMS320C31. Designers now have an additional 1M bits of on-chip SRAM, a maximum throughput of 150 MFLOPS, and several I/O enhancements that allow easy upgrades to current systems or creation of new baselines. This data sheet provides information required to fully utilize the new features of the TMS320VC33 device. For general TMS320C3x architecture and programming information, see the TMS320C3x User’s Guide (literature number SPRU031).

下載 觀看有字幕稿的影片 影片

TI 不提供設計支援

此產品沒有 TI 針對新專案提供的持續設計支援,例如新內容或軟體更新。若有提供,您可在產品資料夾中找到相關資訊、軟體與工具。您也可以在 TI E2ETM 支援論壇中搜尋封存的資訊。

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 29
類型 標題 日期
* Data sheet TMS320VC33 Digital Signal Processor datasheet (Rev. E) 2004年 1月 30日
Application note 320C3x, 320C4x, and 320MCM42x Power-Up Sensitivity at Cold Temperatures (Rev. D) 2004年 8月 6日
User guide TMS320C33 User's Guide (Rev. F) 2004年 3月 31日
More literature SM302VC33GNMM150, SMJ320VC33HFGM150, SM320VC33GNMEP (Rev. C) 2002年 12月 18日
Application note UltraLow-Power Supply Voltage Supervisor Family TPS383x 2000年 6月 20日
User guide TMS320C3x/C4x Assembly Language Tools User's Guide (Rev. D) 1998年 4月 16日
User guide TMS320C3x/C4x Optimizing C Compiler User's Guide (Rev. H) 1998年 4月 14日
Application note EDRAM Memory Controller for the TMS320C31 DSP Application Report 1998年 1月 1日
User guide TMS320C3x General-Purpose Applications User's Guide 1998年 1月 1日
Application note An Adaptive Noise Cancelling System to Enhance Sonar Receiver Performance -C31 1997年 7月 1日
Application note Implementing Vocoder and HFF Modem Algorithms Using the TMS320C31 DSP 1997年 7月 1日
Application note Implementing a Fast 3-D Vision Sensor With Multiple TMS320C31 DSPs 1997年 7月 1日
Application note Implementing a Noise Cancellation System with the TMS320C31 1997年 7月 1日
Application note In-Service, Non-Intrusive Measurement Device in Telecomm. Networks - TMS320C31 1997年 7月 1日
Application note Real-Tme Implementation of a COFDM Modem for Data Transmission Over HF Channels 1997年 7月 1日
Application note Signal Processing Subsystem-Detection of Stimulated Otoacoustic Emissions 'C31 1997年 7月 1日
Application note Switching From Bootloader to MP Mode with TMS320C31 1997年 6月 1日
Application note An Introduction to Fractal Image Compression 1997年 1月 1日
Application note Interfacing Memory to the TMS320C32 DSP (Rev. A) 1996年 5月 1日
Application note FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control (Rev. A) 1996年 3月 1日
Application note FIFO Synchronous Retransmit: Programmable DSP-Interface for FIR Filtering (Rev. A) 1996年 3月 1日
Application note Interfacing TI Clocked FIFOs With TI Floating-Point DSPs (Rev. A) 1996年 3月 1日
Application note How TMS320 Tools Interact With the TMS320C32's Enhanced Memory Interface 1995年 11月 1日
Application note Engine Knock Detection Using Spectral Analysis With TMS320C25 or TMS320C30 DSPs 1995年 1月 1日
User guide JTAG/MPSD Emulation Technical Reference (Rev. A) 1994年 12月 1日
Application note Setting Up TMS320 DSP Interrupts in 'C' 1994年 11月 1日
User guide TMS320C3x Workstation Emulator Installation Guide 1994年 11月 1日
User guide TMS320C3x Evaluation Module Installation Guide 1993年 11月 1日
Application note TMS320C31 Embedded Control Technical Brief 1992年 8月 1日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

IDE、配置、編譯器或偵錯程式

CODECOMPOSER — Code Composer IDE - TMS320C3x/C4x 裝置

Additional Information


Code Composer v4 was the last release of the Code Composer IDE that supported older digital signal processors such as TMS320C3x/4x and TMS320C2x/C5x.  There were different versions for these families. These products are no longer available for purchase or download. (...)

設計工具

PROCESSORS-3P-SEARCH — Arm 架構 MPU、arm 架構 MCU 和 DSP 第三方搜尋工具

TI 已與公司合作,提供各種使用 TI 處理器的軟體、工具和 SOM 以加速生產。下載此搜尋工具,以快速瀏覽我們的第三方解決方案,並找出符合您需求的正確協力廠商。此處列出的軟體、工具和模組,皆由獨立第三方而非由德州儀器生產及管理。

搜尋工具會依產品類型分類,如下所示:

  • 工具包括 IDE/編譯器、偵錯和追蹤、模擬和建模軟體及快閃程式設計師。
  • OS 包含 TI 處理器支援的作業系統。
  • 應用軟體意指特定應用程式軟體,包括在 TI 處理器上執行的中介軟體和程式庫。
  • SOM 意指系統模組解決方案
封裝 引腳 下載
LQFP (PGE) 144 檢視選項

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 資格摘要
  • 進行中可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片