TMUX582F-SEP
- Radiation hardened
- Single event latch-up (SEL) immune to 43 MeV-cm2/mg at 125°C
- ELDRS free to 30 krad(Si)
- Total ionizing dose (TID) RLAT for every wafer lot up to 20 krad(Si)
- TID characterized up to 50 krad(Si)
- Space enhanced plastic
- Supply range: 8 V to 22 V or ±5 V to ±16.5 V
- Integrated powered-off and overvoltage protection:
- Overvoltage tolerance up to 85 V from source to supplies or to drain
- Overvoltage and power-off protected up to ±60 V
- Cold sparing capable up to ±60 V
- Adjustable fault threshold thresholds (Vfp and Vfn) from 5 V to supplies
- Interrupt flag feedback indicating faulted channel
- Non-fault channels continue to operate with low leakage currents
- Latch-up immune construction
- Precision performance with 100 pA typical leakage current, 3.5 pF capacitance, and 1% Ron flatness
- Operating temperature from –55°C to +125°C
- Controlled baseline
- Gold wire
- NiPdAu lead finish
- Extended product life cycle
- Extended product-change notification
- Product traceability
- Enhanced mold compound for low outgassing
- Small, industry standard TSSOP-20 packaging
The TMUX582F-SEP is a modern 8:1 multiplexer suitable for both single ended and differential operation. This latch-up immune device offers robust overvoltage protection up to ±60 V making it optimal for harsh space environments. Additionally, this protection operates in powered-on, powered-off, and floating supply conditions.
During a fault such as an overvoltage or undervoltage event, the offending channel turns OFF and the Sx pin becomes high impedance. If this fault channel is selected, the drain (D) is pulled to the fault rail that is exceeded (Vfp or Vfn). All other Sx pins which are not under fault continue to operate normally. During normal operation, when the source (Sx) does not exceed Vfp or Vfn, the switch operates with low leakage, low capacitance and an ultra-flat on-resistance. This provides high performance signal integrity with minimal distortion.
The TMUX582F-SEP is a fault protected CMOS multiplexer flexible enough to handle almost any application, from system monitoring, to power-up sequencing protection, to high precision front end data acquisition.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TMUX582F-SEP ±60-V Protected, Latch-up Immune 8:1 Multiplexer with Adjustable Fault Thresholds in Space Enhanced Plastic datasheet | PDF | HTML | 2023年 6月 28日 |
| * | Radiation & reliability report | TMUX582F-SEP Production Flow and Reliability Report | 2024年 1月 2日 |
設計與開發
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TMUX-24PW-EVM — 適用於 16、20 和 24 針腳 PW 封裝的通用 TMUX 評估模組
TMUX-24PW-EVM 可對 TI 的 TMUX 產品系列進行快速原型設計和 DC 特性分析，這些產品使用 16、20 或 24 針腳 TSSOP 封裝 (PW)，並且額定用於高電壓操作。
| 封裝 | 引腳 | 下載 |
|---|---|---|
| TSSOP (PW) | 20 | 檢視選項 |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 資格摘要
- 進行中可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。