產品詳細資料

Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Audio Ron (typ) (Ω) 0.7 CON (typ) (pF) 176 ON-state leakage current (max) (µA) 0.375 Supply current (typ) (µA) 6 Bandwidth (MHz) 32 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make, Supports I2C signals, Supports negative voltages Input/output continuous current (max) (A) 0.15 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 2:1 SPDT Number of channels 2 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Audio Ron (typ) (Ω) 0.7 CON (typ) (pF) 176 ON-state leakage current (max) (µA) 0.375 Supply current (typ) (µA) 6 Bandwidth (MHz) 32 Operating temperature range (°C) -40 to 85 Features 1.8-V compatible control inputs, Break-before-make, Supports I2C signals, Supports negative voltages Input/output continuous current (max) (A) 0.15 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
DSBGA (YFC) 12 1.8369 mm² 1.57 x 1.17
  • Negative Signaling Capability: Maximum Swing From –2.75 V to 2.75 V (V+ = 2.75 V)
  • Low ON-State Resistance (0.7 Ω Typ)
  • Excellent ON-State Resistance Matching
  • 1.8-V Compatible Control Input Threshold Independent of V+
  • Control Inputs Are 5.5-V Tolerant
  • 2.25-V to 5.5-V Power Supply (V+)
  • Low Charge Injection
  • Specified Break-Before-Make Switching
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2500-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
    • 200-V Machine Model (A115-A)
  • Negative Signaling Capability: Maximum Swing From –2.75 V to 2.75 V (V+ = 2.75 V)
  • Low ON-State Resistance (0.7 Ω Typ)
  • Excellent ON-State Resistance Matching
  • 1.8-V Compatible Control Input Threshold Independent of V+
  • Control Inputs Are 5.5-V Tolerant
  • 2.25-V to 5.5-V Power Supply (V+)
  • Low Charge Injection
  • Specified Break-Before-Make Switching
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2500-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
    • 200-V Machine Model (A115-A)

The TS5A22366 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device features negative signal capability that allows signals below ground to pass through the switch without distortion.

The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications.

The TS5A22366 is available is a ultra small 1.6 mm × 1.2 mm wafer-chip-scale package (WCSP) (0.4 mm pitch).

The TS5A22366 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device features negative signal capability that allows signals below ground to pass through the switch without distortion.

The break-before-make feature prevents signal distortion during the transferring of a signal from one path to another. Low ON-state resistance, excellent channel-to-channel ON-state resistance matching, and minimal total harmonic distortion (THD) performance are ideal for audio applications.

The TS5A22366 is available is a ultra small 1.6 mm × 1.2 mm wafer-chip-scale package (WCSP) (0.4 mm pitch).

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類型 標題 日期
* Data sheet 0.8-Ohm Dual SPDT Analog Switch With Negative Rail Capability and 1.8-V Compatib datasheet (Rev. B) 2013年 6月 3日
Application brief 1.8-V Logic for Multiplexers and Signal Switches (Rev. C) PDF | HTML 2022年 7月 26日
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 2022年 6月 2日
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 2021年 12月 1日
Application note Preventing Excess Power Consumption on Analog Switches 2008年 7月 3日
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日

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模擬型號

HSPICE Model for TS5A22366

SCDM125.ZIP (106 KB) - HSpice Model
模擬型號

TS5A22366 IBIS Model

SCDM124.ZIP (67 KB) - IBIS Model
封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YFC) 12 Ultra Librarian

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