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TXG8020

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具有 2/0 配置的 ±80V、2 位元固定方向接地位準轉換器

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TXG8020

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Rating Catalog Applications GPIO Ground offset voltage (max) (V) 80 Bits (#) 2 Forward/reverse channels 2 forward / 0 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 250 Topology Push-Pull Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features Partial power down (Ioff)
Rating Catalog Applications GPIO Ground offset voltage (max) (V) 80 Bits (#) 2 Forward/reverse channels 2 forward / 0 reverse Isolation rating Functional Data rate (max) (Mbps) 250 Prop delay (ns) 5.9 CMTI (V/µs) 250 Topology Push-Pull Technology family TXG Vin (min) (V) 1.71 Vin (max) (V) 5.5 Vout (min) (V) 1.71 Vout (max) (V) 5.5 Current consumption per channel (1 Mbps) (typ) (mA) 3.3 Features Partial power down (Ioff)
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Supports DC shifts up to ±80V
  • AC Noise Rejection of 140VPP up to 1MHz
  • CMTI of 250V/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (<0.20ns)
  • Greater than 250Mbps
  • Low power consumption (0.8mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG8020: 2 forward
    • TXG8021: 1 forward, 1 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 2500V human-body model
    • 500V charged-device model
  • Package options provided:
    • DSG (WSON-8)
    • DDF (SOT-8)
    • D (SOIC-8)
  • Supports DC shifts up to ±80V
  • AC Noise Rejection of 140VPP up to 1MHz
  • CMTI of 250V/µs
  • Low Prop Delay (<5ns) and Ch-Ch Skew (<0.20ns)
  • Greater than 250Mbps
  • Low power consumption (0.8mA per channel at 1Mbps, 1.8V)
  • Fully configurable dual-rail design allows each port to operate from 1.71V to 5.5V
  • 4, 2, 1 channel devices with multiple configurations will be available
  • Two device variants:
    • TXG8020: 2 forward
    • TXG8021: 1 forward, 1 reverse
  • Supports VCC disconnect feature (I/Os are forced into high-Z)
  • Schmitt-trigger inputs allows for slow and noisy signals
  • Inputs with integrated static pull-down resistors prevent channels from floating
  • Operating temperature from –40°C to +125°C
  • Latch-up performance exceeds 100mA per JESD 78, class II
    • ESD protection exceeds JESD 22
    • 2500V human-body model
    • 500V charged-device model
  • Package options provided:
    • DSG (WSON-8)
    • DDF (SOT-8)
    • D (SOIC-8)

The TXG802x is a 2-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG802x family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. The leakage between GNDA and GNDB is <2µA when VCC to GND is shorted.

The TXG802x device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 140VPP up to 1MHz (Figure 7-4). This device can support multiple interfaces such as UART, GPIO, and JTAG.

The TXG802x is a 2-bit, fixed direction, non-galvanic based voltage and ground-level translator that can support both logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±80V. Compared to traditional level shifters, the TXG802x family can solve the challenges of voltage translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to parasitic resistance or capacitance.

VCCA is referenced to GNDA and VCCB is referenced to GNDB. Ax pins are referenced to VCCA logic level while Bx pins are referenced to VCCB logic levels. Both A port and B port can accept voltages from 1.71V to 5.5V. The leakage between GNDA and GNDB is <2µA when VCC to GND is shorted.

The TXG802x device helps improve noise immunity and power sequencing across different ground domains while providing low power consumption, latency and channel-to-channel skew. It can supress noise levels of 140VPP up to 1MHz (Figure 7-4). This device can support multiple interfaces such as UART, GPIO, and JTAG.
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* Data sheet TXG802x 2-bit , ± 80V Ground-Level Translator datasheet PDF | HTML 2025年 6月 17日

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