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8-Bit, 3.0-GSPS Analog-to-Digital Converter (ADC) with 4K Buffer

Inventory: 3,648

Quality information

RoHS Yes
Lead finish / Ball material SN
MSL rating / Peak reflow Level-3-260C-168 HR
Material content View
DPPM / MTBF / Fit rate View
Qualification summary View
Ongoing reliability monitoring View
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Packaging information

Package | Pins Package qty | Carrier Operating temperature range (°C)
HLQFP (NNB) | 128 60 | JEDEC TRAY (10+1)
-40 to 85
Package | Pins HLQFP (NNB) | 128
Package qty | Carrier 60 | JEDEC TRAY (10+1)
Operating temperature range (°C) -40 to 85
View TI packaging information

Features for the ADC08B3000

  • Single +1.9V ±0.1V Operation
  • Choice of SDR or DDR Output Clocking
  • Internal selectable 4K Data Buffer
  • Serial Interface for Extended Control
  • Adjustment of Input Full-Scale Range, Offset and Clock Phase
  • Duty Cycle Corrected Sample Clock
  • Test Pattern Output Capability

Key Specifications

  • Resolution: 8 Bits
  • Max Conversion Rate: 3 Gsps (min)
  • Code Error Rate: 10-18 (typ)
  • ENOB @ 748 MHz Input: 7.1 Bits (typ)
  • SNR @ 748 MHz: 44.9 dB (typ)
  • Full Power Bandwidth: 3 GHz (typ)
  • Power Consumption
    • Full Power Capure: 1.6 W (typ)
    • Power Down Mode: 25 mW (typ)

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Description for the ADC08B3000

The ADC08B3000 is a single, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sample rates up to 3.4 Gigasamples Per Second, (Gsps). Consuming a typical 1.6 Watts at 3 Gsps from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration scheme enable an excellent response of all dynamic parameters up to Nyquist, producing a high 7.1 Effective Number Of Bits, (ENOB), with a 748 MHz input signal and a 3 GHz sample rate while providing a 10-18 Code Error Rate. A sample rate of 3 Gsps is achieved by interleaving two ADCs, each operating at 1.5 Gsps. Output formatting is offset binary. The device contains a 4K Capture Buffer with output on two 8-bit Low Voltage CMOS (LVCMOS) output buses at rates up to 200MHz.

The converter typically consumes less than 25 mW in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤ TA ≤ +85°C) temperature range.


Qty Price (USD)
1-9 235.066
10-99 216.41
100+ 186.56