ADC32RF80EVM

ADC32RF80 dual-channel, 14-bit, 3-GSPS, RF-sampling wideband receiver evaluation module

ADC32RF80EVM

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Overview

The ADC32RF80 evaluation module (EVM) demonstrates the performance of a dual 3-GSPS 14-bit analog-to-digital converter (ADC) with the JESD204B interface. The EVM includes the ADC32RF80 device, and JESD204B clocking is provided by the LMK04828 and TI voltage regulators to provide the necessary voltages. The input for each channel of the ADC is, by default, connected to a transformer input circuit, which can be connected to a 50-Ω single-ended signal source.

The clock reference input is provided via a transformer input and can be connected to a 50-Ω single-ended clock source. An onboard LMK04828 can be used to generate the necessary JESD204B clocks.

Configuration register access is provided through the onboard USB connection and a Windows®-based GUI. An industry-standard JESD204B pin assignment on an FMC connector allows direct connection to the TSW14J56 Capture Card, as well as many commercially available FPGA development platforms.

  • Onboard clock generation, or external clocking supported with LMK04828 generating SYSREF
  • JESD204B data interface to simplify digital interface; compliant up to 10.8-Gbps lane rates
  • Supports JESD204B subclass 1 for synchronization and compatibility
  • Optional decimation filter outputs sample data at reduced sample rate for improved SNR
  • On-chip dither to improve SFDR

  • ADC32RF80 EVM
  • 5-V DC power adapter
  • USB cable

Receivers
ADC32RF80 Dual-channel, 14-bit, 3-GSPS, dual DDC/channel, RF-sampling wideband receiver and feedback IC ADC32RF83 Dual-channel, 14-bit, 3-GSPS, single DDC/channel, RF-sampling wideband receiver and feedback IC

 

High-speed ADCs (>10MSPS)
ADC31RF80 14-Bit, 3-GSPS, RF-Sampling Wideband Receiver and Feedback IC
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Evaluation board

ADC32RF80EVM – ADC32RF80 dual-channel, 14-bit, 3-GSPS, RF-sampling wideband receiver evaluation module

Evaluation board

ADC32RF80EVM-BDL – ADC32RF80EVM + TSW14J57EVM Data Capture / Pattern Generator Bundle

GUI for evaluation module (EVM)

ADC32RFxxEVM SPI GUI Installer (Rev. B) – SBAC148B.ZIP (179936KB)

Firmware

Arria10 + ADC32RF44 Design – SBAC186.ZIP (7827KB)

Firmware

KCU105 + ADC32RF44 Design Firmware – SBAC187.ZIP (59136KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

ADC32RFxxEVM Design Package SBAC147.ZIP (7034 KB)

Technical documentation

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Type Title Date
* User guide ADC32RFxxEVM User's Guide (Rev. E) Jan. 31, 2020
More literature ADC32RF80EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
More literature Arria10 + ADC32RF44 Design Dec. 06, 2017
More literature KCU105 + ADC32RF44 Design Firmware Dec. 06, 2017

Related design resources

Hardware development

EVALUATION BOARD
TSW14J56EVMData capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps
TSW14J57EVMData capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps

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