ADS54J66EVM

ADS54J66 Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter Evaluation Module

ADS54J66EVM

Order now

Overview

The ADS54J66EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J66 and LMK04828 clock jitter cleaner. The ADS54J66 is a low power, 14-bit, 500-MSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface. The EVM has transformer coupled analog inputs to accommodate a wide range of signal sources and frequencies. The LMK04828 provides an ultra-low-jitter and phase noise ADC sample clock along with System Reference clocks and Device Sample clock for a complete JESD204B subclass 1 clocking solution.

The ADS54J66 and LMK04828 are controlled through an easy to use software GUI to enable quick configuration for a variety of uses.

The ADS54J66EVM connects directly to the TSW14J56EVM data capture hardware via the high speed FMC connector. The High Speed Data Converter Pro Software is also available for data capture and analysis support when using the TSW14J56EVM.

Features
  • Flexible transformer coupled analog input to allow for a variety of sources and frequencies
  • Easy to use software GUI to configure the ADS54J66 and LMK04828 for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High Speed Data Converter Pro software
  • Simple connection to TSW14J56EVM capture card

USB cable
Cable Assy

High-speed ADCs (>10MSPS)
ADS54J66 Quad-Channel, 14-Bit, 500-MSPS Analog-to-Digital Converter (ADC)

 

Clock jitter cleaners & synchronizers
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

Order & start development

Explore packages of hardware, software and documentation

HARDWARE AND SOFTWARE PACKAGE

Evaluate with ADS54J66

View package

Order this hardware only

Evaluation board

ADS54J66EVM – ADS54J66 Evaluation Module

In stock
Limit: 3
TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

ADS54Jxx Design File (Rev. A) SBAC155A.ZIP (3977 KB)

Technical documentation

star
= Top documentation selected by TI
No results found. Please clear your search and try again.
View all 2
Type Title Date
* User guide ADS54J/58J6x Evaluation Module User's Guide (Rev. D) Jan. 13, 2016
Certificate ADS54J66EVM EU Declaration of Conformity (DoC) Jan. 02, 2019

Related design resources

Hardware development

EVALUATION BOARD
TSW14J50EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-6.5Gbps TSW14J56EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​

Videos