DisplayPort Video 4:1 Aggregation Reference Design


Design files


This verified reference design is a complete four channel DisplayPort aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous DisplayPort (DP) sources together into one 10.8 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is used to de-aggregate and seamlessly redisplay the original video content.

  • 1:8 clock distributior synchonizes source inputs with the aggregator
  • Combines four 720p DisplayPort video sources  into a single serial link for transmission over a single differential pair or optical fiber
  • Recovery, de-aggregation and seamless display of the original video content at remote nodes located hundreds of meters away
  • Schematic, layout, test data and design documentation are provided for ease of reuse
  • Adaptive equalization and transmit de-emphasis integrated into both low-speed and high-speed side to reduce jitter and increase transmission distance
??image.gallery.download_en_US?? View video with transcript Video

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

TIDU643.PDF (859 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

TIDRBU6.PDF (4146 K)

Detailed schematic diagram for design layout and components


Complete listing of design components, reference designators, and manufacturers/part numbers


Files used for 3D models or 2D drawings of IC components

TIDC764.ZIP (2361 K)

Design file that contains information on physical board layer of design PCB

TIDRBU8.PDF (6984 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

AND gates

SN74LVC1G081-ch, 2-input 1.65-V to 5.5-V 32 mA drive strength AND gate

Data sheet: PDF
Auto-direction voltage translators

TXB01088-Bit Bidirectional Voltage-Level Shifter with Auto Direction Sensing and +/-15-kV ESD Protect

Data sheet: PDF | HTML
Clock buffers

CDCLVP1204Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer

Data sheet: PDF | HTML
Clock generators

CDCM62082:8 ultra-low power, low jitter clock generator

Data sheet: PDF | HTML
Direction-controlled voltage translators

SN74AVCH1T45Single-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs

Data sheet: PDF | HTML
I2C general-purpose I/Os (GPIOs)

TCA642424-bit translating 1.65- to 5.5-V I2C/SMBus I/O expander with interrupt, reset & config registers

Data sheet: PDF
Linear & low-dropout (LDO) regulators

TLV702300-mA, high-PSRR, low-IQ, low-dropout voltage regulator with enable

Data sheet: PDF | HTML
Linear & low-dropout (LDO) regulators

TPS744013-A, low-VIN (0.8-V), low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator

Data sheet: PDF | HTML
Other interfaces

TLK1002210-Gbps dual-channel multi-rate universal link aggregator

Data sheet: PDF
Supervisor & reset ICs

TPS3125Push-pull, supply voltage supervisor with manual reset

Data sheet: PDF | HTML

Technical documentation

No results found. Please clear your search and try again.
View all 2
Type Title Date
Test report TIDA-00309 Test Results Nov. 17, 2014
Application note Video Aggregation – Display Port Interface Application Sheet Dec. 16, 2013

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​